179     __ Vstr(vixl32::SRegister(first), MemOperand(sp, stack_offset));  in SaveContiguousSRegisterList()
183     __ Vstr(vixl32::SRegister(first++), MemOperand(sp, stack_offset));  in SaveContiguousSRegisterList()
213     __ Vstr(vixl32::SRegister(last + 1), MemOperand(sp, stack_offset));  in SaveContiguousSRegisterList()
228     __ Vldr(vixl32::SRegister(first), MemOperand(sp, stack_offset));  in RestoreContiguousSRegisterList()
232     __ Vldr(vixl32::SRegister(first++), MemOperand(sp, stack_offset));  in RestoreContiguousSRegisterList()
261     __ Vldr(vixl32::SRegister(last + 1), MemOperand(sp, stack_offset));  in RestoreContiguousSRegisterList()
1021   stream << vixl32::SRegister(reg);  in DumpFloatingPointRegister()
2217       vixl::aarch32::SRegister sreg(LeastSignificantBit(fpu_spill_mask_));  in GenerateFrameEntry()
2234       __ Vpush(SRegisterList(vixl32::SRegister(first), POPCOUNT(fpu_spill_mask_)));  in GenerateFrameEntry()
2290       vixl::aarch32::SRegister sreg(LeastSignificantBit(fpu_spill_mask_));  in GenerateFrameExit()
2313       __ Vpop(SRegisterList(vixl32::SRegister(first), POPCOUNT(fpu_spill_mask_)));  in GenerateFrameExit()
2316       GetAssembler()->cfi().RestoreMany(DWARFReg(vixl32::SRegister(0)), fpu_spill_mask_);  in GenerateFrameExit()
3868           vixl32::SRegister temp = LowSRegisterFrom(locations->GetTemp(0));  in VisitTypeConversion()
3875           vixl32::SRegister temp_s = LowSRegisterFrom(locations->GetTemp(0));  in VisitTypeConversion()
3960           vixl32::SRegister out_s = LowSRegisterFrom(out);  in VisitTypeConversion()
3962           vixl32::SRegister temp_s = LowSRegisterFrom(locations->GetTemp(0));  in VisitTypeConversion()
4761   vixl32::SRegister op1 = SRegisterFrom(op1_loc);  in GenerateMinMaxFloat()
4762   vixl32::SRegister op2 = SRegisterFrom(op2_loc);  in GenerateMinMaxFloat()
4763   vixl32::SRegister out = SRegisterFrom(out_loc);  in GenerateMinMaxFloat()
6499       vixl32::SRegister out = SRegisterFrom(out_loc);  in VisitArrayGet()
7257     vixl32::SRegister reg = source.IsFpuRegister()  in EmitSwap()