Lines Matching refs:first
3169 Location first = locations->InAt(0); in VisitAdd() local
3176 if (out.AsRegister<Register>() == first.AsRegister<Register>()) { in VisitAdd()
3179 __ addl(out.AsRegister<Register>(), first.AsRegister<Register>()); in VisitAdd()
3182 first.AsRegister<Register>(), second.AsRegister<Register>(), TIMES_1, 0)); in VisitAdd()
3186 if (out.AsRegister<Register>() == first.AsRegister<Register>()) { in VisitAdd()
3189 __ leal(out.AsRegister<Register>(), Address(first.AsRegister<Register>(), value)); in VisitAdd()
3192 DCHECK(first.Equals(locations->Out())); in VisitAdd()
3193 __ addl(first.AsRegister<Register>(), Address(ESP, second.GetStackIndex())); in VisitAdd()
3200 __ addl(first.AsRegisterPairLow<Register>(), second.AsRegisterPairLow<Register>()); in VisitAdd()
3201 __ adcl(first.AsRegisterPairHigh<Register>(), second.AsRegisterPairHigh<Register>()); in VisitAdd()
3203 __ addl(first.AsRegisterPairLow<Register>(), Address(ESP, second.GetStackIndex())); in VisitAdd()
3204 __ adcl(first.AsRegisterPairHigh<Register>(), in VisitAdd()
3209 __ addl(first.AsRegisterPairLow<Register>(), Immediate(Low32Bits(value))); in VisitAdd()
3210 __ adcl(first.AsRegisterPairHigh<Register>(), Immediate(High32Bits(value))); in VisitAdd()
3217 __ addss(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>()); in VisitAdd()
3221 __ addss(first.AsFpuRegister<XmmRegister>(), in VisitAdd()
3228 __ addss(first.AsFpuRegister<XmmRegister>(), Address(ESP, second.GetStackIndex())); in VisitAdd()
3235 __ addsd(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>()); in VisitAdd()
3239 __ addsd(first.AsFpuRegister<XmmRegister>(), in VisitAdd()
3246 __ addsd(first.AsFpuRegister<XmmRegister>(), Address(ESP, second.GetStackIndex())); in VisitAdd()
3288 Location first = locations->InAt(0); in VisitSub() local
3290 DCHECK(first.Equals(locations->Out())); in VisitSub()
3294 __ subl(first.AsRegister<Register>(), second.AsRegister<Register>()); in VisitSub()
3296 __ subl(first.AsRegister<Register>(), in VisitSub()
3299 __ subl(first.AsRegister<Register>(), Address(ESP, second.GetStackIndex())); in VisitSub()
3306 __ subl(first.AsRegisterPairLow<Register>(), second.AsRegisterPairLow<Register>()); in VisitSub()
3307 __ sbbl(first.AsRegisterPairHigh<Register>(), second.AsRegisterPairHigh<Register>()); in VisitSub()
3309 __ subl(first.AsRegisterPairLow<Register>(), Address(ESP, second.GetStackIndex())); in VisitSub()
3310 __ sbbl(first.AsRegisterPairHigh<Register>(), in VisitSub()
3315 __ subl(first.AsRegisterPairLow<Register>(), Immediate(Low32Bits(value))); in VisitSub()
3316 __ sbbl(first.AsRegisterPairHigh<Register>(), Immediate(High32Bits(value))); in VisitSub()
3323 __ subss(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>()); in VisitSub()
3327 __ subss(first.AsFpuRegister<XmmRegister>(), in VisitSub()
3334 __ subss(first.AsFpuRegister<XmmRegister>(), Address(ESP, second.GetStackIndex())); in VisitSub()
3341 __ subsd(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>()); in VisitSub()
3345 __ subsd(first.AsFpuRegister<XmmRegister>(), in VisitSub()
3352 __ subsd(first.AsFpuRegister<XmmRegister>(), Address(ESP, second.GetStackIndex())); in VisitSub()
3406 Location first = locations->InAt(0); in VisitMul() local
3416 __ imull(out.AsRegister<Register>(), first.AsRegister<Register>(), imm); in VisitMul()
3418 DCHECK(first.Equals(out)); in VisitMul()
3419 __ imull(first.AsRegister<Register>(), second.AsRegister<Register>()); in VisitMul()
3422 DCHECK(first.Equals(out)); in VisitMul()
3423 __ imull(first.AsRegister<Register>(), Address(ESP, second.GetStackIndex())); in VisitMul()
3428 Register in1_hi = first.AsRegisterPairHigh<Register>(); in VisitMul()
3429 Register in1_lo = first.AsRegisterPairLow<Register>(); in VisitMul()
3510 DCHECK(first.Equals(locations->Out())); in VisitMul()
3512 __ mulss(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>()); in VisitMul()
3516 __ mulss(first.AsFpuRegister<XmmRegister>(), in VisitMul()
3523 __ mulss(first.AsFpuRegister<XmmRegister>(), Address(ESP, second.GetStackIndex())); in VisitMul()
3529 DCHECK(first.Equals(locations->Out())); in VisitMul()
3531 __ mulsd(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>()); in VisitMul()
3535 __ mulsd(first.AsFpuRegister<XmmRegister>(), in VisitMul()
3542 __ mulsd(first.AsFpuRegister<XmmRegister>(), Address(ESP, second.GetStackIndex())); in VisitMul()
3598 Location first = locations->InAt(0); in GenerateRemFP() local
3609 PushOntoFPStack(first, 0, 2 * elem_size, /* is_fp= */ true, is_wide); in GenerateRemFP()
3789 Location first = locations->InAt(0); in GenerateDivRemIntegral() local
3795 DCHECK_EQ(EAX, first.AsRegister<Register>()); in GenerateDivRemIntegral()
3839 DCHECK_EQ(calling_convention.GetRegisterAt(0), first.AsRegisterPairLow<Register>()); in GenerateDivRemIntegral()
3840 DCHECK_EQ(calling_convention.GetRegisterAt(1), first.AsRegisterPairHigh<Register>()); in GenerateDivRemIntegral()
3913 Location first = locations->InAt(0); in VisitDiv() local
3925 __ divss(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>()); in VisitDiv()
3929 __ divss(first.AsFpuRegister<XmmRegister>(), in VisitDiv()
3936 __ divss(first.AsFpuRegister<XmmRegister>(), Address(ESP, second.GetStackIndex())); in VisitDiv()
3943 __ divsd(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>()); in VisitDiv()
3947 __ divsd(first.AsFpuRegister<XmmRegister>(), in VisitDiv()
3954 __ divsd(first.AsFpuRegister<XmmRegister>(), Address(ESP, second.GetStackIndex())); in VisitDiv()
4419 Location first = locations->InAt(0); in HandleShift() local
4421 DCHECK(first.Equals(locations->Out())); in HandleShift()
4425 DCHECK(first.IsRegister()); in HandleShift()
4426 Register first_reg = first.AsRegister<Register>(); in HandleShift()
4458 GenerateShlLong(first, second_reg); in HandleShift()
4460 GenerateShrLong(first, second_reg); in HandleShift()
4462 GenerateUShrLong(first, second_reg); in HandleShift()
4470 GenerateShlLong(first, shift); in HandleShift()
4472 GenerateShrLong(first, shift); in HandleShift()
4474 GenerateUShrLong(first, shift); in HandleShift()
4614 Location first = locations->InAt(0); in VisitRor() local
4618 Register first_reg = first.AsRegister<Register>(); in VisitRor()
4630 Register first_reg_lo = first.AsRegisterPairLow<Register>(); in VisitRor()
4631 Register first_reg_hi = first.AsRegisterPairHigh<Register>(); in VisitRor()
7720 Location first = locations->InAt(0); in VisitX86AndNot() local
7725 first.AsRegister<Register>(), in VisitX86AndNot()
7730 first.AsRegisterPairLow<Register>(), in VisitX86AndNot()
7733 first.AsRegisterPairHigh<Register>(), in VisitX86AndNot()
7792 Location first = locations->InAt(0); in HandleBitwiseOperation() local
7794 DCHECK(first.Equals(locations->Out())); in HandleBitwiseOperation()
7799 __ andl(first.AsRegister<Register>(), second.AsRegister<Register>()); in HandleBitwiseOperation()
7801 __ orl(first.AsRegister<Register>(), second.AsRegister<Register>()); in HandleBitwiseOperation()
7804 __ xorl(first.AsRegister<Register>(), second.AsRegister<Register>()); in HandleBitwiseOperation()
7808 __ andl(first.AsRegister<Register>(), in HandleBitwiseOperation()
7811 __ orl(first.AsRegister<Register>(), in HandleBitwiseOperation()
7815 __ xorl(first.AsRegister<Register>(), in HandleBitwiseOperation()
7820 __ andl(first.AsRegister<Register>(), Address(ESP, second.GetStackIndex())); in HandleBitwiseOperation()
7822 __ orl(first.AsRegister<Register>(), Address(ESP, second.GetStackIndex())); in HandleBitwiseOperation()
7825 __ xorl(first.AsRegister<Register>(), Address(ESP, second.GetStackIndex())); in HandleBitwiseOperation()
7832 __ andl(first.AsRegisterPairLow<Register>(), second.AsRegisterPairLow<Register>()); in HandleBitwiseOperation()
7833 __ andl(first.AsRegisterPairHigh<Register>(), second.AsRegisterPairHigh<Register>()); in HandleBitwiseOperation()
7835 __ orl(first.AsRegisterPairLow<Register>(), second.AsRegisterPairLow<Register>()); in HandleBitwiseOperation()
7836 __ orl(first.AsRegisterPairHigh<Register>(), second.AsRegisterPairHigh<Register>()); in HandleBitwiseOperation()
7839 __ xorl(first.AsRegisterPairLow<Register>(), second.AsRegisterPairLow<Register>()); in HandleBitwiseOperation()
7840 __ xorl(first.AsRegisterPairHigh<Register>(), second.AsRegisterPairHigh<Register>()); in HandleBitwiseOperation()
7844 __ andl(first.AsRegisterPairLow<Register>(), Address(ESP, second.GetStackIndex())); in HandleBitwiseOperation()
7845 __ andl(first.AsRegisterPairHigh<Register>(), in HandleBitwiseOperation()
7848 __ orl(first.AsRegisterPairLow<Register>(), Address(ESP, second.GetStackIndex())); in HandleBitwiseOperation()
7849 __ orl(first.AsRegisterPairHigh<Register>(), in HandleBitwiseOperation()
7853 __ xorl(first.AsRegisterPairLow<Register>(), Address(ESP, second.GetStackIndex())); in HandleBitwiseOperation()
7854 __ xorl(first.AsRegisterPairHigh<Register>(), in HandleBitwiseOperation()
7864 Register first_low = first.AsRegisterPairLow<Register>(); in HandleBitwiseOperation()
7865 Register first_high = first.AsRegisterPairHigh<Register>(); in HandleBitwiseOperation()