Lines Matching refs:temp0
1132 const vixl32::Register temp0 = RegisterFrom(locations->GetTemp(0)); in VisitStringCompareTo() local
1167 __ Lsr(temp0, temp3, 1u); in VisitStringCompareTo()
1171 __ Ldr(temp0, MemOperand(str, count_offset)); in VisitStringCompareTo()
1175 __ Subs(out, temp0, temp1); in VisitStringCompareTo()
1184 __ mov(gt, temp0, temp1); in VisitStringCompareTo()
1190 __ CompareAndBranchIfZero(temp0, &end, mirror::kUseStringCompression); in VisitStringCompareTo()
1206 __ add(ne, temp0, temp0, temp0); in VisitStringCompareTo()
1229 const vixl32::Register temp0 = RegisterFrom(locations->GetTemp(0)); in GenerateStringCompareToLoop() local
1270 __ Subs(temp0, temp0, (mirror::kUseStringCompression ? 8 : 4)); in GenerateStringCompareToLoop()
1276 __ Subs(temp0, temp0, 4); // 4 bytes previously compared. in GenerateStringCompareToLoop()
1281 __ Sub(temp0, temp0, 2); in GenerateStringCompareToLoop()
1304 __ Cmp(temp0, Operand(temp1, vixl32::LSR, (mirror::kUseStringCompression ? 3 : 4))); in GenerateStringCompareToLoop()
1344 __ Add(temp0, temp0, temp0); // Unlike LSL, this ADD is always 16-bit. in GenerateStringCompareToLoop()
1357 __ Sbc(temp0, temp0, 0); // Complete the move of the compression flag. in GenerateStringCompareToLoop()
1373 __ Subs(temp0, temp0, 2); in GenerateStringCompareToLoop()
1383 __ Lsrs(temp0, temp0, 1u); in GenerateStringCompareToLoop()