Lines Matching refs:vixl32

38 namespace vixl32 = vixl::aarch32;  variable
43 inline dwarf::Reg DWARFReg(vixl32::Register reg) { in DWARFReg()
47 inline dwarf::Reg DWARFReg(vixl32::SRegister reg) { in DWARFReg()
51 class ArmVIXLMacroAssembler final : public vixl32::MacroAssembler {
58 : vixl32::MacroAssembler(ArmVIXLMacroAssembler::kDefaultCodeBufferCapacity) {} in ArmVIXLMacroAssembler()
69 void CompareAndBranchIfZero(vixl32::Register rn,
70 vixl32::Label* label,
72 void CompareAndBranchIfNonZero(vixl32::Register rn,
73 vixl32::Label* label,
86 void (func_name)(vixl32::Register rd, vixl32::Register rn, const vixl32::Operand& operand) { \
87 MacroAssembler::func_name(vixl32::DontCare, rd, rn, operand); \
111 void (func_name)(vixl32::Register rd, const vixl32::Operand& operand) { \
112 MacroAssembler::func_name(vixl32::DontCare, rd, operand); \
122 void Rrx(vixl32::Register rd, vixl32::Register rn) { in Rrx()
123 MacroAssembler::Rrx(vixl32::DontCare, rd, rn); in Rrx()
127 void Mul(vixl32::Register rd, vixl32::Register rn, vixl32::Register rm) { in Mul()
128 MacroAssembler::Mul(vixl32::DontCare, rd, rn, rm); in Mul()
134 void Add(vixl32::Register rd, vixl32::Register rn, const vixl32::Operand& operand) { in Add()
138 MacroAssembler::Add(vixl32::DontCare, rd, rn, operand); in Add()
144 void B(vixl32::Label* label);
148 void B(vixl32::Condition cond, vixl32::Label* label, bool is_far_target = true);
151 void Vmov(vixl32::DRegister rd, double imm) { in Vmov()
201 void PoisonHeapReference(vixl32::Register reg);
203 void UnpoisonHeapReference(vixl32::Register reg);
205 void MaybePoisonHeapReference(vixl32::Register reg);
207 void MaybeUnpoisonHeapReference(vixl32::Register reg);
216 void GenerateMarkingRegisterCheck(vixl32::Register temp, int code = 0);
219 vixl32::Register reg,
220 vixl32::Register base,
222 void StoreSToOffset(vixl32::SRegister source, vixl32::Register base, int32_t offset);
223 void StoreDToOffset(vixl32::DRegister source, vixl32::Register base, int32_t offset);
225 void LoadImmediate(vixl32::Register dest, int32_t value);
227 vixl32::Register reg,
228 vixl32::Register base,
230 void LoadSFromOffset(vixl32::SRegister reg, vixl32::Register base, int32_t offset);
231 void LoadDFromOffset(vixl32::DRegister reg, vixl32::Register base, int32_t offset);
245 vixl32::Register temp,
246 vixl32::Register base,
251 void AddConstant(vixl32::Register rd, int32_t value);
252 void AddConstant(vixl32::Register rd, vixl32::Register rn, int32_t value);
253 void AddConstantInIt(vixl32::Register rd,
254 vixl32::Register rn,
256 vixl32::Condition cond = vixl32::al);
262 vixl32::RawLiteral::kPlacedWhenUsed, in CreateLiteralDestroyedWithPool()
263 vixl32::RawLiteral::kDeletedOnPoolDestruction); in CreateLiteralDestroyedWithPool()
273 extern const vixl32::Register tr;
275 extern const vixl32::Register mr;