290   Arm64ManagedRegister dst = m_dst.AsArm64();  in LoadRef()  local
291   CHECK(dst.IsXRegister()) << dst;  in LoadRef()
292   LoadWFromOffset(kLoadWord, dst.AsOverlappingWRegister(), SP, offs.Int32Value());  in LoadRef()
299   Arm64ManagedRegister dst = m_dst.AsArm64();  in LoadRef()  local
301   CHECK(dst.IsXRegister() && base.IsXRegister());  in LoadRef()
302   LoadWFromOffset(kLoadWord, dst.AsOverlappingWRegister(), base.AsXRegister(),  in LoadRef()
305     WRegister ref_reg = dst.AsOverlappingWRegister();  in LoadRef()
313   Arm64ManagedRegister dst = m_dst.AsArm64();  in LoadRawPtr()  local
315   CHECK(dst.IsXRegister() && base.IsXRegister());  in LoadRawPtr()
318   temps.Exclude(reg_x(dst.AsXRegister()), reg_x(base.AsXRegister()));  in LoadRawPtr()
319   ___ Ldr(reg_x(dst.AsXRegister()), MEM_OP(reg_x(base.AsXRegister()), offs.Int32Value()));  in LoadRawPtr()
323   Arm64ManagedRegister dst = m_dst.AsArm64();  in LoadRawPtrFromThread()  local
324   CHECK(dst.IsXRegister()) << dst;  in LoadRawPtrFromThread()
325   LoadFromOffset(dst.AsXRegister(), TR, offs.Int32Value());  in LoadRawPtrFromThread()
412   Arm64ManagedRegister dst = m_dst.AsArm64();  in Move()  local
416     if (dst.IsXRegister()) {  in Move()
417       CHECK(!temps.IsAvailable(reg_x(dst.AsXRegister())));  in Move()
418     } else if (dst.IsWRegister()) {  in Move()
419       CHECK(!temps.IsAvailable(reg_w(dst.AsWRegister())));  in Move()
420     } else if (dst.IsSRegister()) {  in Move()
421       CHECK(!temps.IsAvailable(reg_s(dst.AsSRegister())));  in Move()
423       CHECK(!temps.IsAvailable(reg_d(dst.AsDRegister())));  in Move()
427   if (!dst.Equals(src)) {  in Move()
428     if (dst.IsXRegister()) {  in Move()
431         ___ Mov(reg_w(dst.AsOverlappingWRegister()), reg_w(src.AsWRegister()));  in Move()
434           ___ Mov(reg_x(dst.AsXRegister()), reg_x(src.AsXRegister()));  in Move()
436           ___ Mov(reg_x(dst.AsXRegister()), reg_x(src.AsOverlappingXRegister()));  in Move()
439     } else if (dst.IsWRegister()) {  in Move()
441       ___ Mov(reg_w(dst.AsWRegister()), reg_w(src.AsWRegister()));  in Move()
442     } else if (dst.IsSRegister()) {  in Move()
444       ___ Fmov(reg_s(dst.AsSRegister()), reg_s(src.AsSRegister()));  in Move()
446       CHECK(dst.IsDRegister()) << dst;  in Move()
448       ___ Fmov(reg_d(dst.AsDRegister()), reg_d(src.AsDRegister()));  in Move()