3301 void X86Assembler::shll(Register operand, Register shifter) {  in shll()  argument
3302   EmitGenericShift(4, Operand(operand), shifter);  in shll()
3321 void X86Assembler::shrl(Register operand, Register shifter) {  in shrl()  argument
3322   EmitGenericShift(5, Operand(operand), shifter);  in shrl()
3341 void X86Assembler::sarl(Register operand, Register shifter) {  in sarl()  argument
3342   EmitGenericShift(7, Operand(operand), shifter);  in sarl()
3397 void X86Assembler::roll(Register operand, Register shifter) {  in roll()  argument
3398   EmitGenericShift(0, Operand(operand), shifter);  in roll()
3407 void X86Assembler::rorl(Register operand, Register shifter) {  in rorl()  argument
3408   EmitGenericShift(1, Operand(operand), shifter);  in rorl()
3748 void X86Assembler::EmitOperand(int reg_or_opcode, const Operand& operand) {  in EmitOperand()  argument
3751   const int length = operand.length_;  in EmitOperand()
3754   CHECK_EQ(operand.encoding_[0] & 0x38, 0);  in EmitOperand()
3755   EmitUint8(operand.encoding_[0] + (reg_or_opcode << 3));  in EmitOperand()
3758     EmitUint8(operand.encoding_[i]);  in EmitOperand()
3760   AssemblerFixup* fixup = operand.GetFixup();  in EmitOperand()
3778                                const Operand& operand,  in EmitComplex()  argument
3786     EmitOperand(reg_or_opcode, operand);  in EmitComplex()
3788   } else if (operand.IsRegister(EAX)) {  in EmitComplex()
3794     EmitOperand(reg_or_opcode, operand);  in EmitComplex()
3835                                     const Operand& operand,  in EmitGenericShift()  argument
3841     EmitOperand(reg_or_opcode, operand);  in EmitGenericShift()
3844     EmitOperand(reg_or_opcode, operand);  in EmitGenericShift()
3851                                     const Operand& operand,  in EmitGenericShift()  argument
3856   EmitOperand(reg_or_opcode, operand);  in EmitGenericShift()
3958                                            X86ManagedRegister operand,  in EmitVexPrefixByteOne()  argument
3970   if (operand.IsNoRegister()) {  in EmitVexPrefixByteOne()
3972   } else if (operand.IsXmmRegister()) {  in EmitVexPrefixByteOne()
3973     XmmRegister vvvv = operand.AsXmmRegister();  in EmitVexPrefixByteOne()
3977   } else if (operand.IsCpuRegister()) {  in EmitVexPrefixByteOne()
3978     Register vvvv = operand.AsCpuRegister();  in EmitVexPrefixByteOne()
3992                                            X86ManagedRegister operand,  in EmitVexPrefixByteTwo()  argument
4003   if (operand.IsXmmRegister()) {  in EmitVexPrefixByteTwo()
4004     XmmRegister vvvv = operand.AsXmmRegister();  in EmitVexPrefixByteTwo()
4008   } else if (operand.IsCpuRegister()) {  in EmitVexPrefixByteTwo()
4009     Register vvvv = operand.AsCpuRegister();  in EmitVexPrefixByteTwo()