Lines Matching refs:dst
142 void X86_64Assembler::movq(CpuRegister dst, const Immediate& imm) { in movq() argument
146 EmitRex64(dst); in movq()
148 EmitRegisterOperand(0, dst.LowBits()); in movq()
151 EmitRex64(dst); in movq()
152 EmitUint8(0xB8 + dst.LowBits()); in movq()
158 void X86_64Assembler::movl(CpuRegister dst, const Immediate& imm) { in movl() argument
161 EmitOptionalRex32(dst); in movl()
162 EmitUint8(0xB8 + dst.LowBits()); in movl()
167 void X86_64Assembler::movq(const Address& dst, const Immediate& imm) { in movq() argument
170 EmitRex64(dst); in movq()
172 EmitOperand(0, dst); in movq()
177 void X86_64Assembler::movq(CpuRegister dst, CpuRegister src) { in movq() argument
180 EmitRex64(src, dst); in movq()
182 EmitRegisterOperand(src.LowBits(), dst.LowBits()); in movq()
186 void X86_64Assembler::movl(CpuRegister dst, CpuRegister src) { in movl() argument
188 EmitOptionalRex32(dst, src); in movl()
190 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in movl()
194 void X86_64Assembler::movq(CpuRegister dst, const Address& src) { in movq() argument
196 EmitRex64(dst, src); in movq()
198 EmitOperand(dst.LowBits(), src); in movq()
202 void X86_64Assembler::movl(CpuRegister dst, const Address& src) { in movl() argument
204 EmitOptionalRex32(dst, src); in movl()
206 EmitOperand(dst.LowBits(), src); in movl()
210 void X86_64Assembler::movq(const Address& dst, CpuRegister src) { in movq() argument
212 EmitRex64(src, dst); in movq()
214 EmitOperand(src.LowBits(), dst); in movq()
218 void X86_64Assembler::movl(const Address& dst, CpuRegister src) { in movl() argument
220 EmitOptionalRex32(src, dst); in movl()
222 EmitOperand(src.LowBits(), dst); in movl()
225 void X86_64Assembler::movl(const Address& dst, const Immediate& imm) { in movl() argument
227 EmitOptionalRex32(dst); in movl()
229 EmitOperand(0, dst); in movl()
233 void X86_64Assembler::movntl(const Address& dst, CpuRegister src) { in movntl() argument
235 EmitOptionalRex32(src, dst); in movntl()
238 EmitOperand(src.LowBits(), dst); in movntl()
241 void X86_64Assembler::movntq(const Address& dst, CpuRegister src) { in movntq() argument
243 EmitRex64(src, dst); in movntq()
246 EmitOperand(src.LowBits(), dst); in movntq()
249 void X86_64Assembler::cmov(Condition c, CpuRegister dst, CpuRegister src) { in cmov() argument
250 cmov(c, dst, src, true); in cmov()
253 void X86_64Assembler::cmov(Condition c, CpuRegister dst, CpuRegister src, bool is64bit) { in cmov() argument
255 EmitOptionalRex(false, is64bit, dst.NeedsRex(), false, src.NeedsRex()); in cmov()
258 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in cmov()
262 void X86_64Assembler::cmov(Condition c, CpuRegister dst, const Address& src, bool is64bit) { in cmov() argument
265 EmitRex64(dst, src); in cmov()
267 EmitOptionalRex32(dst, src); in cmov()
271 EmitOperand(dst.LowBits(), src); in cmov()
275 void X86_64Assembler::movzxb(CpuRegister dst, CpuRegister src) { in movzxb() argument
277 EmitOptionalByteRegNormalizingRex32(dst, src); in movzxb()
280 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in movzxb()
284 void X86_64Assembler::movzxb(CpuRegister dst, const Address& src) { in movzxb() argument
288 EmitOptionalRex32(dst, src); in movzxb()
291 EmitOperand(dst.LowBits(), src); in movzxb()
295 void X86_64Assembler::movsxb(CpuRegister dst, CpuRegister src) { in movsxb() argument
297 EmitOptionalByteRegNormalizingRex32(dst, src); in movsxb()
300 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in movsxb()
304 void X86_64Assembler::movsxb(CpuRegister dst, const Address& src) { in movsxb() argument
308 EmitOptionalRex32(dst, src); in movsxb()
311 EmitOperand(dst.LowBits(), src); in movsxb()
320 void X86_64Assembler::movb(const Address& dst, CpuRegister src) { in movb() argument
322 EmitOptionalByteRegNormalizingRex32(src, dst); in movb()
324 EmitOperand(src.LowBits(), dst); in movb()
328 void X86_64Assembler::movb(const Address& dst, const Immediate& imm) { in movb() argument
330 EmitOptionalRex32(dst); in movb()
332 EmitOperand(Register::RAX, dst); in movb()
338 void X86_64Assembler::movzxw(CpuRegister dst, CpuRegister src) { in movzxw() argument
340 EmitOptionalRex32(dst, src); in movzxw()
343 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in movzxw()
347 void X86_64Assembler::movzxw(CpuRegister dst, const Address& src) { in movzxw() argument
349 EmitOptionalRex32(dst, src); in movzxw()
352 EmitOperand(dst.LowBits(), src); in movzxw()
356 void X86_64Assembler::movsxw(CpuRegister dst, CpuRegister src) { in movsxw() argument
358 EmitOptionalRex32(dst, src); in movsxw()
361 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in movsxw()
365 void X86_64Assembler::movsxw(CpuRegister dst, const Address& src) { in movsxw() argument
367 EmitOptionalRex32(dst, src); in movsxw()
370 EmitOperand(dst.LowBits(), src); in movsxw()
379 void X86_64Assembler::movw(const Address& dst, CpuRegister src) { in movw() argument
382 EmitOptionalRex32(src, dst); in movw()
384 EmitOperand(src.LowBits(), dst); in movw()
388 void X86_64Assembler::movw(const Address& dst, const Immediate& imm) { in movw() argument
391 EmitOptionalRex32(dst); in movw()
393 EmitOperand(Register::RAX, dst); in movw()
400 void X86_64Assembler::leaq(CpuRegister dst, const Address& src) { in leaq() argument
402 EmitRex64(dst, src); in leaq()
404 EmitOperand(dst.LowBits(), src); in leaq()
408 void X86_64Assembler::leal(CpuRegister dst, const Address& src) { in leal() argument
410 EmitOptionalRex32(dst, src); in leal()
412 EmitOperand(dst.LowBits(), src); in leal()
416 void X86_64Assembler::movaps(XmmRegister dst, XmmRegister src) { in movaps() argument
418 vmovaps(dst, src); in movaps()
422 EmitOptionalRex32(dst, src); in movaps()
425 EmitXmmRegisterOperand(dst.LowBits(), src); in movaps()
430 void X86_64Assembler::vmovaps(XmmRegister dst, XmmRegister src) { in vmovaps() argument
434 bool load = dst.NeedsRex(); in vmovaps()
437 if (src.NeedsRex()&& dst.NeedsRex()) { in vmovaps()
445 bool rex_bit = (load) ? dst.NeedsRex() : src.NeedsRex(); in vmovaps()
451 byte_one = EmitVexPrefixByteOne(dst.NeedsRex(), in vmovaps()
472 EmitXmmRegisterOperand(src.LowBits(), dst); in vmovaps()
474 EmitXmmRegisterOperand(dst.LowBits(), src); in vmovaps()
478 void X86_64Assembler::movaps(XmmRegister dst, const Address& src) { in movaps() argument
480 vmovaps(dst, src); in movaps()
484 EmitOptionalRex32(dst, src); in movaps()
487 EmitOperand(dst.LowBits(), src); in movaps()
491 void X86_64Assembler::vmovaps(XmmRegister dst, const Address& src) { in vmovaps() argument
506 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vmovaps()
511 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vmovaps()
527 EmitOperand(dst.LowBits(), src); in vmovaps()
530 void X86_64Assembler::movups(XmmRegister dst, const Address& src) { in movups() argument
532 vmovups(dst, src); in movups()
536 EmitOptionalRex32(dst, src); in movups()
539 EmitOperand(dst.LowBits(), src); in movups()
543 void X86_64Assembler::vmovups(XmmRegister dst, const Address& src) { in vmovups() argument
558 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vmovups()
563 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vmovups()
579 EmitOperand(dst.LowBits(), src); in vmovups()
583 void X86_64Assembler::movaps(const Address& dst, XmmRegister src) { in movaps() argument
585 vmovaps(dst, src); in movaps()
589 EmitOptionalRex32(src, dst); in movaps()
592 EmitOperand(src.LowBits(), dst); in movaps()
596 void X86_64Assembler::vmovaps(const Address& dst, XmmRegister src) { in vmovaps() argument
603 uint8_t rex = dst.rex(); in vmovaps()
633 EmitOperand(src.LowBits(), dst); in vmovaps()
636 void X86_64Assembler::movups(const Address& dst, XmmRegister src) { in movups() argument
638 vmovups(dst, src); in movups()
642 EmitOptionalRex32(src, dst); in movups()
645 EmitOperand(src.LowBits(), dst); in movups()
649 void X86_64Assembler::vmovups(const Address& dst, XmmRegister src) { in vmovups() argument
656 uint8_t rex = dst.rex(); in vmovups()
686 EmitOperand(src.LowBits(), dst); in vmovups()
690 void X86_64Assembler::movss(XmmRegister dst, const Address& src) { in movss() argument
693 EmitOptionalRex32(dst, src); in movss()
696 EmitOperand(dst.LowBits(), src); in movss()
700 void X86_64Assembler::movss(const Address& dst, XmmRegister src) { in movss() argument
703 EmitOptionalRex32(src, dst); in movss()
706 EmitOperand(src.LowBits(), dst); in movss()
710 void X86_64Assembler::movss(XmmRegister dst, XmmRegister src) { in movss() argument
713 EmitOptionalRex32(src, dst); // Movss is MR encoding instead of the usual RM. in movss()
716 EmitXmmRegisterOperand(src.LowBits(), dst); in movss()
720 void X86_64Assembler::movsxd(CpuRegister dst, CpuRegister src) { in movsxd() argument
722 EmitRex64(dst, src); in movsxd()
724 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in movsxd()
728 void X86_64Assembler::movsxd(CpuRegister dst, const Address& src) { in movsxd() argument
730 EmitRex64(dst, src); in movsxd()
732 EmitOperand(dst.LowBits(), src); in movsxd()
736 void X86_64Assembler::movd(XmmRegister dst, CpuRegister src) { in movd() argument
737 movd(dst, src, true); in movd()
740 void X86_64Assembler::movd(CpuRegister dst, XmmRegister src) { in movd() argument
741 movd(dst, src, true); in movd()
744 void X86_64Assembler::movd(XmmRegister dst, CpuRegister src, bool is64bit) { in movd() argument
747 EmitOptionalRex(false, is64bit, dst.NeedsRex(), false, src.NeedsRex()); in movd()
750 EmitOperand(dst.LowBits(), Operand(src)); in movd()
753 void X86_64Assembler::movd(CpuRegister dst, XmmRegister src, bool is64bit) { in movd() argument
756 EmitOptionalRex(false, is64bit, src.NeedsRex(), false, dst.NeedsRex()); in movd()
759 EmitOperand(src.LowBits(), Operand(dst)); in movd()
762 void X86_64Assembler::addss(XmmRegister dst, XmmRegister src) { in addss() argument
765 EmitOptionalRex32(dst, src); in addss()
768 EmitXmmRegisterOperand(dst.LowBits(), src); in addss()
771 void X86_64Assembler::addss(XmmRegister dst, const Address& src) { in addss() argument
774 EmitOptionalRex32(dst, src); in addss()
777 EmitOperand(dst.LowBits(), src); in addss()
781 void X86_64Assembler::subss(XmmRegister dst, XmmRegister src) { in subss() argument
784 EmitOptionalRex32(dst, src); in subss()
787 EmitXmmRegisterOperand(dst.LowBits(), src); in subss()
791 void X86_64Assembler::subss(XmmRegister dst, const Address& src) { in subss() argument
794 EmitOptionalRex32(dst, src); in subss()
797 EmitOperand(dst.LowBits(), src); in subss()
801 void X86_64Assembler::mulss(XmmRegister dst, XmmRegister src) { in mulss() argument
804 EmitOptionalRex32(dst, src); in mulss()
807 EmitXmmRegisterOperand(dst.LowBits(), src); in mulss()
811 void X86_64Assembler::mulss(XmmRegister dst, const Address& src) { in mulss() argument
814 EmitOptionalRex32(dst, src); in mulss()
817 EmitOperand(dst.LowBits(), src); in mulss()
821 void X86_64Assembler::divss(XmmRegister dst, XmmRegister src) { in divss() argument
824 EmitOptionalRex32(dst, src); in divss()
827 EmitXmmRegisterOperand(dst.LowBits(), src); in divss()
831 void X86_64Assembler::divss(XmmRegister dst, const Address& src) { in divss() argument
834 EmitOptionalRex32(dst, src); in divss()
837 EmitOperand(dst.LowBits(), src); in divss()
841 void X86_64Assembler::addps(XmmRegister dst, XmmRegister src) { in addps() argument
843 EmitOptionalRex32(dst, src); in addps()
846 EmitXmmRegisterOperand(dst.LowBits(), src); in addps()
850 void X86_64Assembler::subps(XmmRegister dst, XmmRegister src) { in subps() argument
852 EmitOptionalRex32(dst, src); in subps()
855 EmitXmmRegisterOperand(dst.LowBits(), src); in subps()
858 void X86_64Assembler::vaddps(XmmRegister dst, XmmRegister add_left, XmmRegister add_right) { in vaddps() argument
870 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_NONE); in vaddps()
872 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vaddps()
884 EmitXmmRegisterOperand(dst.LowBits(), add_right); in vaddps()
887 void X86_64Assembler::vsubps(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vsubps() argument
898 byte_one = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_NONE); in vsubps()
900 byte_one = EmitVexPrefixByteOne(dst.NeedsRex(), /*X=*/ false, src2.NeedsRex(), SET_VEX_M_0F); in vsubps()
909 EmitXmmRegisterOperand(dst.LowBits(), src2); in vsubps()
913 void X86_64Assembler::mulps(XmmRegister dst, XmmRegister src) { in mulps() argument
915 EmitOptionalRex32(dst, src); in mulps()
918 EmitXmmRegisterOperand(dst.LowBits(), src); in mulps()
921 void X86_64Assembler::vmulps(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vmulps() argument
933 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_NONE); in vmulps()
935 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vmulps()
947 EmitXmmRegisterOperand(dst.LowBits(), src2); in vmulps()
950 void X86_64Assembler::divps(XmmRegister dst, XmmRegister src) { in divps() argument
952 EmitOptionalRex32(dst, src); in divps()
955 EmitXmmRegisterOperand(dst.LowBits(), src); in divps()
958 void X86_64Assembler::vdivps(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vdivps() argument
970 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_NONE); in vdivps()
972 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vdivps()
984 EmitXmmRegisterOperand(dst.LowBits(), src2); in vdivps()
994 void X86_64Assembler::fsts(const Address& dst) { in fsts() argument
997 EmitOperand(2, dst); in fsts()
1001 void X86_64Assembler::fstps(const Address& dst) { in fstps() argument
1004 EmitOperand(3, dst); in fstps()
1008 void X86_64Assembler::movapd(XmmRegister dst, XmmRegister src) { in movapd() argument
1010 vmovapd(dst, src); in movapd()
1015 EmitOptionalRex32(dst, src); in movapd()
1018 EmitXmmRegisterOperand(dst.LowBits(), src); in movapd()
1022 void X86_64Assembler::vmovapd(XmmRegister dst, XmmRegister src) { in vmovapd() argument
1028 if (src.NeedsRex() && dst.NeedsRex()) { in vmovapd()
1033 bool load = dst.NeedsRex(); in vmovapd()
1036 bool rex_bit = load ? dst.NeedsRex() : src.NeedsRex(); in vmovapd()
1042 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vmovapd()
1063 EmitXmmRegisterOperand(src.LowBits(), dst); in vmovapd()
1065 EmitXmmRegisterOperand(dst.LowBits(), src); in vmovapd()
1069 void X86_64Assembler::movapd(XmmRegister dst, const Address& src) { in movapd() argument
1071 vmovapd(dst, src); in movapd()
1076 EmitOptionalRex32(dst, src); in movapd()
1079 EmitOperand(dst.LowBits(), src); in movapd()
1083 void X86_64Assembler::vmovapd(XmmRegister dst, const Address& src) { in vmovapd() argument
1099 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vmovapd()
1104 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vmovapd()
1120 EmitOperand(dst.LowBits(), src); in vmovapd()
1123 void X86_64Assembler::movupd(XmmRegister dst, const Address& src) { in movupd() argument
1125 vmovupd(dst, src); in movupd()
1130 EmitOptionalRex32(dst, src); in movupd()
1133 EmitOperand(dst.LowBits(), src); in movupd()
1137 void X86_64Assembler::vmovupd(XmmRegister dst, const Address& src) { in vmovupd() argument
1153 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vmovupd()
1158 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vmovupd()
1173 EmitOperand(dst.LowBits(), src); in vmovupd()
1176 void X86_64Assembler::movapd(const Address& dst, XmmRegister src) { in movapd() argument
1178 vmovapd(dst, src); in movapd()
1183 EmitOptionalRex32(src, dst); in movapd()
1186 EmitOperand(src.LowBits(), dst); in movapd()
1190 void X86_64Assembler::vmovapd(const Address& dst, XmmRegister src) { in vmovapd() argument
1196 uint8_t rex = dst.rex(); in vmovapd()
1226 EmitOperand(src.LowBits(), dst); in vmovapd()
1229 void X86_64Assembler::movupd(const Address& dst, XmmRegister src) { in movupd() argument
1231 vmovupd(dst, src); in movupd()
1236 EmitOptionalRex32(src, dst); in movupd()
1239 EmitOperand(src.LowBits(), dst); in movupd()
1243 void X86_64Assembler::vmovupd(const Address& dst, XmmRegister src) { in vmovupd() argument
1250 uint8_t rex = dst.rex(); in vmovupd()
1280 EmitOperand(src.LowBits(), dst); in vmovupd()
1284 void X86_64Assembler::movsd(XmmRegister dst, const Address& src) { in movsd() argument
1287 EmitOptionalRex32(dst, src); in movsd()
1290 EmitOperand(dst.LowBits(), src); in movsd()
1294 void X86_64Assembler::movsd(const Address& dst, XmmRegister src) { in movsd() argument
1297 EmitOptionalRex32(src, dst); in movsd()
1300 EmitOperand(src.LowBits(), dst); in movsd()
1304 void X86_64Assembler::movsd(XmmRegister dst, XmmRegister src) { in movsd() argument
1307 EmitOptionalRex32(src, dst); // Movsd is MR encoding instead of the usual RM. in movsd()
1310 EmitXmmRegisterOperand(src.LowBits(), dst); in movsd()
1314 void X86_64Assembler::addsd(XmmRegister dst, XmmRegister src) { in addsd() argument
1317 EmitOptionalRex32(dst, src); in addsd()
1320 EmitXmmRegisterOperand(dst.LowBits(), src); in addsd()
1324 void X86_64Assembler::addsd(XmmRegister dst, const Address& src) { in addsd() argument
1327 EmitOptionalRex32(dst, src); in addsd()
1330 EmitOperand(dst.LowBits(), src); in addsd()
1334 void X86_64Assembler::subsd(XmmRegister dst, XmmRegister src) { in subsd() argument
1337 EmitOptionalRex32(dst, src); in subsd()
1340 EmitXmmRegisterOperand(dst.LowBits(), src); in subsd()
1344 void X86_64Assembler::subsd(XmmRegister dst, const Address& src) { in subsd() argument
1347 EmitOptionalRex32(dst, src); in subsd()
1350 EmitOperand(dst.LowBits(), src); in subsd()
1354 void X86_64Assembler::mulsd(XmmRegister dst, XmmRegister src) { in mulsd() argument
1357 EmitOptionalRex32(dst, src); in mulsd()
1360 EmitXmmRegisterOperand(dst.LowBits(), src); in mulsd()
1364 void X86_64Assembler::mulsd(XmmRegister dst, const Address& src) { in mulsd() argument
1367 EmitOptionalRex32(dst, src); in mulsd()
1370 EmitOperand(dst.LowBits(), src); in mulsd()
1374 void X86_64Assembler::divsd(XmmRegister dst, XmmRegister src) { in divsd() argument
1377 EmitOptionalRex32(dst, src); in divsd()
1380 EmitXmmRegisterOperand(dst.LowBits(), src); in divsd()
1384 void X86_64Assembler::divsd(XmmRegister dst, const Address& src) { in divsd() argument
1387 EmitOptionalRex32(dst, src); in divsd()
1390 EmitOperand(dst.LowBits(), src); in divsd()
1394 void X86_64Assembler::addpd(XmmRegister dst, XmmRegister src) { in addpd() argument
1397 EmitOptionalRex32(dst, src); in addpd()
1400 EmitXmmRegisterOperand(dst.LowBits(), src); in addpd()
1404 void X86_64Assembler::vaddpd(XmmRegister dst, XmmRegister add_left, XmmRegister add_right) { in vaddpd() argument
1415 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vaddpd()
1417 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vaddpd()
1429 EmitXmmRegisterOperand(dst.LowBits(), add_right); in vaddpd()
1433 void X86_64Assembler::subpd(XmmRegister dst, XmmRegister src) { in subpd() argument
1436 EmitOptionalRex32(dst, src); in subpd()
1439 EmitXmmRegisterOperand(dst.LowBits(), src); in subpd()
1443 void X86_64Assembler::vsubpd(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vsubpd() argument
1454 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vsubpd()
1456 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vsubpd()
1468 EmitXmmRegisterOperand(dst.LowBits(), src2); in vsubpd()
1472 void X86_64Assembler::mulpd(XmmRegister dst, XmmRegister src) { in mulpd() argument
1475 EmitOptionalRex32(dst, src); in mulpd()
1478 EmitXmmRegisterOperand(dst.LowBits(), src); in mulpd()
1481 void X86_64Assembler::vmulpd(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vmulpd() argument
1493 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vmulpd()
1495 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vmulpd()
1507 EmitXmmRegisterOperand(dst.LowBits(), src2); in vmulpd()
1510 void X86_64Assembler::divpd(XmmRegister dst, XmmRegister src) { in divpd() argument
1513 EmitOptionalRex32(dst, src); in divpd()
1516 EmitXmmRegisterOperand(dst.LowBits(), src); in divpd()
1520 void X86_64Assembler::vdivpd(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vdivpd() argument
1532 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vdivpd()
1534 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vdivpd()
1546 EmitXmmRegisterOperand(dst.LowBits(), src2); in vdivpd()
1550 void X86_64Assembler::movdqa(XmmRegister dst, XmmRegister src) { in movdqa() argument
1552 vmovdqa(dst, src); in movdqa()
1557 EmitOptionalRex32(dst, src); in movdqa()
1560 EmitXmmRegisterOperand(dst.LowBits(), src); in movdqa()
1564 void X86_64Assembler::vmovdqa(XmmRegister dst, XmmRegister src) { in vmovdqa() argument
1571 if (src.NeedsRex() && dst.NeedsRex()) { in vmovdqa()
1574 bool load = dst.NeedsRex(); in vmovdqa()
1578 bool rex_bit = load ? dst.NeedsRex() : src.NeedsRex(); in vmovdqa()
1584 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vmovdqa()
1605 EmitXmmRegisterOperand(src.LowBits(), dst); in vmovdqa()
1607 EmitXmmRegisterOperand(dst.LowBits(), src); in vmovdqa()
1611 void X86_64Assembler::movdqa(XmmRegister dst, const Address& src) { in movdqa() argument
1613 vmovdqa(dst, src); in movdqa()
1618 EmitOptionalRex32(dst, src); in movdqa()
1621 EmitOperand(dst.LowBits(), src); in movdqa()
1625 void X86_64Assembler::vmovdqa(XmmRegister dst, const Address& src) { in vmovdqa() argument
1641 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vmovdqa()
1646 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vmovdqa()
1662 EmitOperand(dst.LowBits(), src); in vmovdqa()
1665 void X86_64Assembler::movdqu(XmmRegister dst, const Address& src) { in movdqu() argument
1667 vmovdqu(dst, src); in movdqu()
1672 EmitOptionalRex32(dst, src); in movdqu()
1675 EmitOperand(dst.LowBits(), src); in movdqu()
1680 void X86_64Assembler::vmovdqu(XmmRegister dst, const Address& src) { in vmovdqu() argument
1696 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vmovdqu()
1701 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vmovdqu()
1717 EmitOperand(dst.LowBits(), src); in vmovdqu()
1720 void X86_64Assembler::movdqa(const Address& dst, XmmRegister src) { in movdqa() argument
1722 vmovdqa(dst, src); in movdqa()
1727 EmitOptionalRex32(src, dst); in movdqa()
1730 EmitOperand(src.LowBits(), dst); in movdqa()
1734 void X86_64Assembler::vmovdqa(const Address& dst, XmmRegister src) { in vmovdqa() argument
1740 uint8_t rex = dst.rex(); in vmovdqa()
1770 EmitOperand(src.LowBits(), dst); in vmovdqa()
1773 void X86_64Assembler::movdqu(const Address& dst, XmmRegister src) { in movdqu() argument
1775 vmovdqu(dst, src); in movdqu()
1780 EmitOptionalRex32(src, dst); in movdqu()
1783 EmitOperand(src.LowBits(), dst); in movdqu()
1787 void X86_64Assembler::vmovdqu(const Address& dst, XmmRegister src) { in vmovdqu() argument
1794 uint8_t rex = dst.rex(); in vmovdqu()
1824 EmitOperand(src.LowBits(), dst); in vmovdqu()
1827 void X86_64Assembler::paddb(XmmRegister dst, XmmRegister src) { in paddb() argument
1830 EmitOptionalRex32(dst, src); in paddb()
1833 EmitXmmRegisterOperand(dst.LowBits(), src); in paddb()
1837 void X86_64Assembler::vpaddb(XmmRegister dst, XmmRegister add_left, XmmRegister add_right) { in vpaddb() argument
1849 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vpaddb()
1851 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vpaddb()
1863 EmitXmmRegisterOperand(dst.LowBits(), add_right); in vpaddb()
1867 void X86_64Assembler::psubb(XmmRegister dst, XmmRegister src) { in psubb() argument
1870 EmitOptionalRex32(dst, src); in psubb()
1873 EmitXmmRegisterOperand(dst.LowBits(), src); in psubb()
1877 void X86_64Assembler::vpsubb(XmmRegister dst, XmmRegister add_left, XmmRegister add_right) { in vpsubb() argument
1889 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vpsubb()
1891 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vpsubb()
1903 EmitXmmRegisterOperand(dst.LowBits(), add_right); in vpsubb()
1907 void X86_64Assembler::paddw(XmmRegister dst, XmmRegister src) { in paddw() argument
1910 EmitOptionalRex32(dst, src); in paddw()
1913 EmitXmmRegisterOperand(dst.LowBits(), src); in paddw()
1916 void X86_64Assembler::vpaddw(XmmRegister dst, XmmRegister add_left, XmmRegister add_right) { in vpaddw() argument
1928 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vpaddw()
1930 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vpaddw()
1942 EmitXmmRegisterOperand(dst.LowBits(), add_right); in vpaddw()
1946 void X86_64Assembler::psubw(XmmRegister dst, XmmRegister src) { in psubw() argument
1949 EmitOptionalRex32(dst, src); in psubw()
1952 EmitXmmRegisterOperand(dst.LowBits(), src); in psubw()
1955 void X86_64Assembler::vpsubw(XmmRegister dst, XmmRegister add_left, XmmRegister add_right) { in vpsubw() argument
1967 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vpsubw()
1969 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vpsubw()
1981 EmitXmmRegisterOperand(dst.LowBits(), add_right); in vpsubw()
1985 void X86_64Assembler::pmullw(XmmRegister dst, XmmRegister src) { in pmullw() argument
1988 EmitOptionalRex32(dst, src); in pmullw()
1991 EmitXmmRegisterOperand(dst.LowBits(), src); in pmullw()
1994 void X86_64Assembler::vpmullw(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vpmullw() argument
2006 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vpmullw()
2008 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vpmullw()
2020 EmitXmmRegisterOperand(dst.LowBits(), src2); in vpmullw()
2023 void X86_64Assembler::paddd(XmmRegister dst, XmmRegister src) { in paddd() argument
2026 EmitOptionalRex32(dst, src); in paddd()
2029 EmitXmmRegisterOperand(dst.LowBits(), src); in paddd()
2032 void X86_64Assembler::vpaddd(XmmRegister dst, XmmRegister add_left, XmmRegister add_right) { in vpaddd() argument
2044 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vpaddd()
2046 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vpaddd()
2058 EmitXmmRegisterOperand(dst.LowBits(), add_right); in vpaddd()
2061 void X86_64Assembler::psubd(XmmRegister dst, XmmRegister src) { in psubd() argument
2064 EmitOptionalRex32(dst, src); in psubd()
2067 EmitXmmRegisterOperand(dst.LowBits(), src); in psubd()
2071 void X86_64Assembler::pmulld(XmmRegister dst, XmmRegister src) { in pmulld() argument
2074 EmitOptionalRex32(dst, src); in pmulld()
2078 EmitXmmRegisterOperand(dst.LowBits(), src); in pmulld()
2081 void X86_64Assembler::vpmulld(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vpmulld() argument
2088 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vpmulld()
2097 EmitXmmRegisterOperand(dst.LowBits(), src2); in vpmulld()
2100 void X86_64Assembler::paddq(XmmRegister dst, XmmRegister src) { in paddq() argument
2103 EmitOptionalRex32(dst, src); in paddq()
2106 EmitXmmRegisterOperand(dst.LowBits(), src); in paddq()
2110 void X86_64Assembler::vpaddq(XmmRegister dst, XmmRegister add_left, XmmRegister add_right) { in vpaddq() argument
2122 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vpaddq()
2124 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vpaddq()
2136 EmitXmmRegisterOperand(dst.LowBits(), add_right); in vpaddq()
2140 void X86_64Assembler::psubq(XmmRegister dst, XmmRegister src) { in psubq() argument
2143 EmitOptionalRex32(dst, src); in psubq()
2146 EmitXmmRegisterOperand(dst.LowBits(), src); in psubq()
2149 void X86_64Assembler::vpsubq(XmmRegister dst, XmmRegister add_left, XmmRegister add_right) { in vpsubq() argument
2161 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vpsubq()
2163 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vpsubq()
2175 EmitXmmRegisterOperand(dst.LowBits(), add_right); in vpsubq()
2179 void X86_64Assembler::paddusb(XmmRegister dst, XmmRegister src) { in paddusb() argument
2182 EmitOptionalRex32(dst, src); in paddusb()
2185 EmitXmmRegisterOperand(dst.LowBits(), src); in paddusb()
2189 void X86_64Assembler::paddsb(XmmRegister dst, XmmRegister src) { in paddsb() argument
2192 EmitOptionalRex32(dst, src); in paddsb()
2195 EmitXmmRegisterOperand(dst.LowBits(), src); in paddsb()
2199 void X86_64Assembler::paddusw(XmmRegister dst, XmmRegister src) { in paddusw() argument
2202 EmitOptionalRex32(dst, src); in paddusw()
2205 EmitXmmRegisterOperand(dst.LowBits(), src); in paddusw()
2209 void X86_64Assembler::paddsw(XmmRegister dst, XmmRegister src) { in paddsw() argument
2212 EmitOptionalRex32(dst, src); in paddsw()
2215 EmitXmmRegisterOperand(dst.LowBits(), src); in paddsw()
2219 void X86_64Assembler::psubusb(XmmRegister dst, XmmRegister src) { in psubusb() argument
2222 EmitOptionalRex32(dst, src); in psubusb()
2225 EmitXmmRegisterOperand(dst.LowBits(), src); in psubusb()
2229 void X86_64Assembler::psubsb(XmmRegister dst, XmmRegister src) { in psubsb() argument
2232 EmitOptionalRex32(dst, src); in psubsb()
2235 EmitXmmRegisterOperand(dst.LowBits(), src); in psubsb()
2239 void X86_64Assembler::vpsubd(XmmRegister dst, XmmRegister add_left, XmmRegister add_right) { in vpsubd() argument
2251 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vpsubd()
2253 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vpsubd()
2265 EmitXmmRegisterOperand(dst.LowBits(), add_right); in vpsubd()
2269 void X86_64Assembler::psubusw(XmmRegister dst, XmmRegister src) { in psubusw() argument
2272 EmitOptionalRex32(dst, src); in psubusw()
2275 EmitXmmRegisterOperand(dst.LowBits(), src); in psubusw()
2279 void X86_64Assembler::psubsw(XmmRegister dst, XmmRegister src) { in psubsw() argument
2282 EmitOptionalRex32(dst, src); in psubsw()
2285 EmitXmmRegisterOperand(dst.LowBits(), src); in psubsw()
2289 void X86_64Assembler::cvtsi2ss(XmmRegister dst, CpuRegister src) { in cvtsi2ss() argument
2290 cvtsi2ss(dst, src, false); in cvtsi2ss()
2294 void X86_64Assembler::cvtsi2ss(XmmRegister dst, CpuRegister src, bool is64bit) { in cvtsi2ss() argument
2299 EmitRex64(dst, src); in cvtsi2ss()
2301 EmitOptionalRex32(dst, src); in cvtsi2ss()
2305 EmitOperand(dst.LowBits(), Operand(src)); in cvtsi2ss()
2309 void X86_64Assembler::cvtsi2ss(XmmRegister dst, const Address& src, bool is64bit) { in cvtsi2ss() argument
2314 EmitRex64(dst, src); in cvtsi2ss()
2316 EmitOptionalRex32(dst, src); in cvtsi2ss()
2320 EmitOperand(dst.LowBits(), src); in cvtsi2ss()
2324 void X86_64Assembler::cvtsi2sd(XmmRegister dst, CpuRegister src) { in cvtsi2sd() argument
2325 cvtsi2sd(dst, src, false); in cvtsi2sd()
2329 void X86_64Assembler::cvtsi2sd(XmmRegister dst, CpuRegister src, bool is64bit) { in cvtsi2sd() argument
2334 EmitRex64(dst, src); in cvtsi2sd()
2336 EmitOptionalRex32(dst, src); in cvtsi2sd()
2340 EmitOperand(dst.LowBits(), Operand(src)); in cvtsi2sd()
2344 void X86_64Assembler::cvtsi2sd(XmmRegister dst, const Address& src, bool is64bit) { in cvtsi2sd() argument
2349 EmitRex64(dst, src); in cvtsi2sd()
2351 EmitOptionalRex32(dst, src); in cvtsi2sd()
2355 EmitOperand(dst.LowBits(), src); in cvtsi2sd()
2359 void X86_64Assembler::cvtss2si(CpuRegister dst, XmmRegister src) { in cvtss2si() argument
2362 EmitOptionalRex32(dst, src); in cvtss2si()
2365 EmitXmmRegisterOperand(dst.LowBits(), src); in cvtss2si()
2369 void X86_64Assembler::cvtss2sd(XmmRegister dst, XmmRegister src) { in cvtss2sd() argument
2372 EmitOptionalRex32(dst, src); in cvtss2sd()
2375 EmitXmmRegisterOperand(dst.LowBits(), src); in cvtss2sd()
2379 void X86_64Assembler::cvtss2sd(XmmRegister dst, const Address& src) { in cvtss2sd() argument
2382 EmitOptionalRex32(dst, src); in cvtss2sd()
2385 EmitOperand(dst.LowBits(), src); in cvtss2sd()
2389 void X86_64Assembler::cvtsd2si(CpuRegister dst, XmmRegister src) { in cvtsd2si() argument
2392 EmitOptionalRex32(dst, src); in cvtsd2si()
2395 EmitXmmRegisterOperand(dst.LowBits(), src); in cvtsd2si()
2399 void X86_64Assembler::cvttss2si(CpuRegister dst, XmmRegister src) { in cvttss2si() argument
2400 cvttss2si(dst, src, false); in cvttss2si()
2404 void X86_64Assembler::cvttss2si(CpuRegister dst, XmmRegister src, bool is64bit) { in cvttss2si() argument
2409 EmitRex64(dst, src); in cvttss2si()
2411 EmitOptionalRex32(dst, src); in cvttss2si()
2415 EmitXmmRegisterOperand(dst.LowBits(), src); in cvttss2si()
2419 void X86_64Assembler::cvttsd2si(CpuRegister dst, XmmRegister src) { in cvttsd2si() argument
2420 cvttsd2si(dst, src, false); in cvttsd2si()
2424 void X86_64Assembler::cvttsd2si(CpuRegister dst, XmmRegister src, bool is64bit) { in cvttsd2si() argument
2429 EmitRex64(dst, src); in cvttsd2si()
2431 EmitOptionalRex32(dst, src); in cvttsd2si()
2435 EmitXmmRegisterOperand(dst.LowBits(), src); in cvttsd2si()
2439 void X86_64Assembler::cvtsd2ss(XmmRegister dst, XmmRegister src) { in cvtsd2ss() argument
2442 EmitOptionalRex32(dst, src); in cvtsd2ss()
2445 EmitXmmRegisterOperand(dst.LowBits(), src); in cvtsd2ss()
2449 void X86_64Assembler::cvtsd2ss(XmmRegister dst, const Address& src) { in cvtsd2ss() argument
2452 EmitOptionalRex32(dst, src); in cvtsd2ss()
2455 EmitOperand(dst.LowBits(), src); in cvtsd2ss()
2459 void X86_64Assembler::cvtdq2ps(XmmRegister dst, XmmRegister src) { in cvtdq2ps() argument
2461 EmitOptionalRex32(dst, src); in cvtdq2ps()
2464 EmitXmmRegisterOperand(dst.LowBits(), src); in cvtdq2ps()
2468 void X86_64Assembler::cvtdq2pd(XmmRegister dst, XmmRegister src) { in cvtdq2pd() argument
2471 EmitOptionalRex32(dst, src); in cvtdq2pd()
2474 EmitXmmRegisterOperand(dst.LowBits(), src); in cvtdq2pd()
2554 void X86_64Assembler::roundsd(XmmRegister dst, XmmRegister src, const Immediate& imm) { in roundsd() argument
2557 EmitOptionalRex32(dst, src); in roundsd()
2561 EmitXmmRegisterOperand(dst.LowBits(), src); in roundsd()
2566 void X86_64Assembler::roundss(XmmRegister dst, XmmRegister src, const Immediate& imm) { in roundss() argument
2569 EmitOptionalRex32(dst, src); in roundss()
2573 EmitXmmRegisterOperand(dst.LowBits(), src); in roundss()
2578 void X86_64Assembler::sqrtsd(XmmRegister dst, XmmRegister src) { in sqrtsd() argument
2581 EmitOptionalRex32(dst, src); in sqrtsd()
2584 EmitXmmRegisterOperand(dst.LowBits(), src); in sqrtsd()
2588 void X86_64Assembler::sqrtss(XmmRegister dst, XmmRegister src) { in sqrtss() argument
2591 EmitOptionalRex32(dst, src); in sqrtss()
2594 EmitXmmRegisterOperand(dst.LowBits(), src); in sqrtss()
2598 void X86_64Assembler::xorpd(XmmRegister dst, const Address& src) { in xorpd() argument
2601 EmitOptionalRex32(dst, src); in xorpd()
2604 EmitOperand(dst.LowBits(), src); in xorpd()
2608 void X86_64Assembler::xorpd(XmmRegister dst, XmmRegister src) { in xorpd() argument
2611 EmitOptionalRex32(dst, src); in xorpd()
2614 EmitXmmRegisterOperand(dst.LowBits(), src); in xorpd()
2618 void X86_64Assembler::xorps(XmmRegister dst, const Address& src) { in xorps() argument
2620 EmitOptionalRex32(dst, src); in xorps()
2623 EmitOperand(dst.LowBits(), src); in xorps()
2627 void X86_64Assembler::xorps(XmmRegister dst, XmmRegister src) { in xorps() argument
2629 EmitOptionalRex32(dst, src); in xorps()
2632 EmitXmmRegisterOperand(dst.LowBits(), src); in xorps()
2635 void X86_64Assembler::pxor(XmmRegister dst, XmmRegister src) { in pxor() argument
2638 EmitOptionalRex32(dst, src); in pxor()
2641 EmitXmmRegisterOperand(dst.LowBits(), src); in pxor()
2645 void X86_64Assembler::vpxor(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vpxor() argument
2657 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vpxor()
2659 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vpxor()
2671 EmitXmmRegisterOperand(dst.LowBits(), src2); in vpxor()
2675 void X86_64Assembler::vxorps(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vxorps() argument
2687 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_NONE); in vxorps()
2689 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vxorps()
2701 EmitXmmRegisterOperand(dst.LowBits(), src2); in vxorps()
2705 void X86_64Assembler::vxorpd(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vxorpd() argument
2717 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vxorpd()
2719 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vxorpd()
2731 EmitXmmRegisterOperand(dst.LowBits(), src2); in vxorpd()
2734 void X86_64Assembler::andpd(XmmRegister dst, const Address& src) { in andpd() argument
2737 EmitOptionalRex32(dst, src); in andpd()
2740 EmitOperand(dst.LowBits(), src); in andpd()
2743 void X86_64Assembler::andpd(XmmRegister dst, XmmRegister src) { in andpd() argument
2746 EmitOptionalRex32(dst, src); in andpd()
2749 EmitXmmRegisterOperand(dst.LowBits(), src); in andpd()
2752 void X86_64Assembler::andps(XmmRegister dst, XmmRegister src) { in andps() argument
2754 EmitOptionalRex32(dst, src); in andps()
2757 EmitXmmRegisterOperand(dst.LowBits(), src); in andps()
2760 void X86_64Assembler::pand(XmmRegister dst, XmmRegister src) { in pand() argument
2763 EmitOptionalRex32(dst, src); in pand()
2766 EmitXmmRegisterOperand(dst.LowBits(), src); in pand()
2770 void X86_64Assembler::vpand(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vpand() argument
2782 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vpand()
2784 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vpand()
2796 EmitXmmRegisterOperand(dst.LowBits(), src2); in vpand()
2800 void X86_64Assembler::vandps(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vandps() argument
2812 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_NONE); in vandps()
2814 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vandps()
2826 EmitXmmRegisterOperand(dst.LowBits(), src2); in vandps()
2830 void X86_64Assembler::vandpd(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vandpd() argument
2842 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vandpd()
2844 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vandpd()
2856 EmitXmmRegisterOperand(dst.LowBits(), src2); in vandpd()
2859 void X86_64Assembler::andn(CpuRegister dst, CpuRegister src1, CpuRegister src2) { in andn() argument
2862 uint8_t byte_one = EmitVexPrefixByteOne(dst.NeedsRex(), in andn()
2875 EmitRegisterOperand(dst.LowBits(), src2.LowBits()); in andn()
2878 void X86_64Assembler::andnpd(XmmRegister dst, XmmRegister src) { in andnpd() argument
2881 EmitOptionalRex32(dst, src); in andnpd()
2884 EmitXmmRegisterOperand(dst.LowBits(), src); in andnpd()
2887 void X86_64Assembler::andnps(XmmRegister dst, XmmRegister src) { in andnps() argument
2889 EmitOptionalRex32(dst, src); in andnps()
2892 EmitXmmRegisterOperand(dst.LowBits(), src); in andnps()
2895 void X86_64Assembler::pandn(XmmRegister dst, XmmRegister src) { in pandn() argument
2898 EmitOptionalRex32(dst, src); in pandn()
2901 EmitXmmRegisterOperand(dst.LowBits(), src); in pandn()
2905 void X86_64Assembler::vpandn(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vpandn() argument
2917 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vpandn()
2919 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vpandn()
2931 EmitXmmRegisterOperand(dst.LowBits(), src2); in vpandn()
2935 void X86_64Assembler::vandnps(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vandnps() argument
2947 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_NONE); in vandnps()
2949 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vandnps()
2961 EmitXmmRegisterOperand(dst.LowBits(), src2); in vandnps()
2965 void X86_64Assembler::vandnpd(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vandnpd() argument
2977 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vandnpd()
2979 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vandnpd()
2991 EmitXmmRegisterOperand(dst.LowBits(), src2); in vandnpd()
2994 void X86_64Assembler::orpd(XmmRegister dst, XmmRegister src) { in orpd() argument
2997 EmitOptionalRex32(dst, src); in orpd()
3000 EmitXmmRegisterOperand(dst.LowBits(), src); in orpd()
3003 void X86_64Assembler::orps(XmmRegister dst, XmmRegister src) { in orps() argument
3005 EmitOptionalRex32(dst, src); in orps()
3008 EmitXmmRegisterOperand(dst.LowBits(), src); in orps()
3011 void X86_64Assembler::por(XmmRegister dst, XmmRegister src) { in por() argument
3014 EmitOptionalRex32(dst, src); in por()
3017 EmitXmmRegisterOperand(dst.LowBits(), src); in por()
3021 void X86_64Assembler::vpor(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vpor() argument
3033 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vpor()
3035 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vpor()
3047 EmitXmmRegisterOperand(dst.LowBits(), src2); in vpor()
3051 void X86_64Assembler::vorps(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vorps() argument
3063 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_NONE); in vorps()
3065 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vorps()
3077 EmitXmmRegisterOperand(dst.LowBits(), src2); in vorps()
3081 void X86_64Assembler::vorpd(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vorpd() argument
3093 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vorpd()
3095 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vorpd()
3107 EmitXmmRegisterOperand(dst.LowBits(), src2); in vorpd()
3110 void X86_64Assembler::pavgb(XmmRegister dst, XmmRegister src) { in pavgb() argument
3113 EmitOptionalRex32(dst, src); in pavgb()
3116 EmitXmmRegisterOperand(dst.LowBits(), src); in pavgb()
3119 void X86_64Assembler::pavgw(XmmRegister dst, XmmRegister src) { in pavgw() argument
3122 EmitOptionalRex32(dst, src); in pavgw()
3125 EmitXmmRegisterOperand(dst.LowBits(), src); in pavgw()
3128 void X86_64Assembler::psadbw(XmmRegister dst, XmmRegister src) { in psadbw() argument
3131 EmitOptionalRex32(dst, src); in psadbw()
3134 EmitXmmRegisterOperand(dst.LowBits(), src); in psadbw()
3137 void X86_64Assembler::pmaddwd(XmmRegister dst, XmmRegister src) { in pmaddwd() argument
3140 EmitOptionalRex32(dst, src); in pmaddwd()
3143 EmitXmmRegisterOperand(dst.LowBits(), src); in pmaddwd()
3146 void X86_64Assembler::vpmaddwd(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vpmaddwd() argument
3158 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vpmaddwd()
3160 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vpmaddwd()
3172 EmitXmmRegisterOperand(dst.LowBits(), src2); in vpmaddwd()
3175 void X86_64Assembler::phaddw(XmmRegister dst, XmmRegister src) { in phaddw() argument
3178 EmitOptionalRex32(dst, src); in phaddw()
3182 EmitXmmRegisterOperand(dst.LowBits(), src); in phaddw()
3185 void X86_64Assembler::phaddd(XmmRegister dst, XmmRegister src) { in phaddd() argument
3188 EmitOptionalRex32(dst, src); in phaddd()
3192 EmitXmmRegisterOperand(dst.LowBits(), src); in phaddd()
3195 void X86_64Assembler::haddps(XmmRegister dst, XmmRegister src) { in haddps() argument
3198 EmitOptionalRex32(dst, src); in haddps()
3201 EmitXmmRegisterOperand(dst.LowBits(), src); in haddps()
3204 void X86_64Assembler::haddpd(XmmRegister dst, XmmRegister src) { in haddpd() argument
3207 EmitOptionalRex32(dst, src); in haddpd()
3210 EmitXmmRegisterOperand(dst.LowBits(), src); in haddpd()
3213 void X86_64Assembler::phsubw(XmmRegister dst, XmmRegister src) { in phsubw() argument
3216 EmitOptionalRex32(dst, src); in phsubw()
3220 EmitXmmRegisterOperand(dst.LowBits(), src); in phsubw()
3223 void X86_64Assembler::phsubd(XmmRegister dst, XmmRegister src) { in phsubd() argument
3226 EmitOptionalRex32(dst, src); in phsubd()
3230 EmitXmmRegisterOperand(dst.LowBits(), src); in phsubd()
3233 void X86_64Assembler::hsubps(XmmRegister dst, XmmRegister src) { in hsubps() argument
3236 EmitOptionalRex32(dst, src); in hsubps()
3239 EmitXmmRegisterOperand(dst.LowBits(), src); in hsubps()
3242 void X86_64Assembler::hsubpd(XmmRegister dst, XmmRegister src) { in hsubpd() argument
3245 EmitOptionalRex32(dst, src); in hsubpd()
3248 EmitXmmRegisterOperand(dst.LowBits(), src); in hsubpd()
3251 void X86_64Assembler::pminsb(XmmRegister dst, XmmRegister src) { in pminsb() argument
3254 EmitOptionalRex32(dst, src); in pminsb()
3258 EmitXmmRegisterOperand(dst.LowBits(), src); in pminsb()
3261 void X86_64Assembler::pmaxsb(XmmRegister dst, XmmRegister src) { in pmaxsb() argument
3264 EmitOptionalRex32(dst, src); in pmaxsb()
3268 EmitXmmRegisterOperand(dst.LowBits(), src); in pmaxsb()
3271 void X86_64Assembler::pminsw(XmmRegister dst, XmmRegister src) { in pminsw() argument
3274 EmitOptionalRex32(dst, src); in pminsw()
3277 EmitXmmRegisterOperand(dst.LowBits(), src); in pminsw()
3280 void X86_64Assembler::pmaxsw(XmmRegister dst, XmmRegister src) { in pmaxsw() argument
3283 EmitOptionalRex32(dst, src); in pmaxsw()
3286 EmitXmmRegisterOperand(dst.LowBits(), src); in pmaxsw()
3289 void X86_64Assembler::pminsd(XmmRegister dst, XmmRegister src) { in pminsd() argument
3292 EmitOptionalRex32(dst, src); in pminsd()
3296 EmitXmmRegisterOperand(dst.LowBits(), src); in pminsd()
3299 void X86_64Assembler::pmaxsd(XmmRegister dst, XmmRegister src) { in pmaxsd() argument
3302 EmitOptionalRex32(dst, src); in pmaxsd()
3306 EmitXmmRegisterOperand(dst.LowBits(), src); in pmaxsd()
3309 void X86_64Assembler::pminub(XmmRegister dst, XmmRegister src) { in pminub() argument
3312 EmitOptionalRex32(dst, src); in pminub()
3315 EmitXmmRegisterOperand(dst.LowBits(), src); in pminub()
3318 void X86_64Assembler::pmaxub(XmmRegister dst, XmmRegister src) { in pmaxub() argument
3321 EmitOptionalRex32(dst, src); in pmaxub()
3324 EmitXmmRegisterOperand(dst.LowBits(), src); in pmaxub()
3327 void X86_64Assembler::pminuw(XmmRegister dst, XmmRegister src) { in pminuw() argument
3330 EmitOptionalRex32(dst, src); in pminuw()
3334 EmitXmmRegisterOperand(dst.LowBits(), src); in pminuw()
3337 void X86_64Assembler::pmaxuw(XmmRegister dst, XmmRegister src) { in pmaxuw() argument
3340 EmitOptionalRex32(dst, src); in pmaxuw()
3344 EmitXmmRegisterOperand(dst.LowBits(), src); in pmaxuw()
3347 void X86_64Assembler::pminud(XmmRegister dst, XmmRegister src) { in pminud() argument
3350 EmitOptionalRex32(dst, src); in pminud()
3354 EmitXmmRegisterOperand(dst.LowBits(), src); in pminud()
3357 void X86_64Assembler::pmaxud(XmmRegister dst, XmmRegister src) { in pmaxud() argument
3360 EmitOptionalRex32(dst, src); in pmaxud()
3364 EmitXmmRegisterOperand(dst.LowBits(), src); in pmaxud()
3367 void X86_64Assembler::minps(XmmRegister dst, XmmRegister src) { in minps() argument
3369 EmitOptionalRex32(dst, src); in minps()
3372 EmitXmmRegisterOperand(dst.LowBits(), src); in minps()
3375 void X86_64Assembler::maxps(XmmRegister dst, XmmRegister src) { in maxps() argument
3377 EmitOptionalRex32(dst, src); in maxps()
3380 EmitXmmRegisterOperand(dst.LowBits(), src); in maxps()
3383 void X86_64Assembler::minpd(XmmRegister dst, XmmRegister src) { in minpd() argument
3386 EmitOptionalRex32(dst, src); in minpd()
3389 EmitXmmRegisterOperand(dst.LowBits(), src); in minpd()
3392 void X86_64Assembler::maxpd(XmmRegister dst, XmmRegister src) { in maxpd() argument
3395 EmitOptionalRex32(dst, src); in maxpd()
3398 EmitXmmRegisterOperand(dst.LowBits(), src); in maxpd()
3401 void X86_64Assembler::pcmpeqb(XmmRegister dst, XmmRegister src) { in pcmpeqb() argument
3404 EmitOptionalRex32(dst, src); in pcmpeqb()
3407 EmitXmmRegisterOperand(dst.LowBits(), src); in pcmpeqb()
3410 void X86_64Assembler::pcmpeqw(XmmRegister dst, XmmRegister src) { in pcmpeqw() argument
3413 EmitOptionalRex32(dst, src); in pcmpeqw()
3416 EmitXmmRegisterOperand(dst.LowBits(), src); in pcmpeqw()
3419 void X86_64Assembler::pcmpeqd(XmmRegister dst, XmmRegister src) { in pcmpeqd() argument
3422 EmitOptionalRex32(dst, src); in pcmpeqd()
3425 EmitXmmRegisterOperand(dst.LowBits(), src); in pcmpeqd()
3428 void X86_64Assembler::pcmpeqq(XmmRegister dst, XmmRegister src) { in pcmpeqq() argument
3431 EmitOptionalRex32(dst, src); in pcmpeqq()
3435 EmitXmmRegisterOperand(dst.LowBits(), src); in pcmpeqq()
3438 void X86_64Assembler::pcmpgtb(XmmRegister dst, XmmRegister src) { in pcmpgtb() argument
3441 EmitOptionalRex32(dst, src); in pcmpgtb()
3444 EmitXmmRegisterOperand(dst.LowBits(), src); in pcmpgtb()
3447 void X86_64Assembler::pcmpgtw(XmmRegister dst, XmmRegister src) { in pcmpgtw() argument
3450 EmitOptionalRex32(dst, src); in pcmpgtw()
3453 EmitXmmRegisterOperand(dst.LowBits(), src); in pcmpgtw()
3456 void X86_64Assembler::pcmpgtd(XmmRegister dst, XmmRegister src) { in pcmpgtd() argument
3459 EmitOptionalRex32(dst, src); in pcmpgtd()
3462 EmitXmmRegisterOperand(dst.LowBits(), src); in pcmpgtd()
3465 void X86_64Assembler::pcmpgtq(XmmRegister dst, XmmRegister src) { in pcmpgtq() argument
3468 EmitOptionalRex32(dst, src); in pcmpgtq()
3472 EmitXmmRegisterOperand(dst.LowBits(), src); in pcmpgtq()
3475 void X86_64Assembler::shufpd(XmmRegister dst, XmmRegister src, const Immediate& imm) { in shufpd() argument
3478 EmitOptionalRex32(dst, src); in shufpd()
3481 EmitXmmRegisterOperand(dst.LowBits(), src); in shufpd()
3486 void X86_64Assembler::shufps(XmmRegister dst, XmmRegister src, const Immediate& imm) { in shufps() argument
3488 EmitOptionalRex32(dst, src); in shufps()
3491 EmitXmmRegisterOperand(dst.LowBits(), src); in shufps()
3496 void X86_64Assembler::pshufd(XmmRegister dst, XmmRegister src, const Immediate& imm) { in pshufd() argument
3499 EmitOptionalRex32(dst, src); in pshufd()
3502 EmitXmmRegisterOperand(dst.LowBits(), src); in pshufd()
3507 void X86_64Assembler::punpcklbw(XmmRegister dst, XmmRegister src) { in punpcklbw() argument
3510 EmitOptionalRex32(dst, src); in punpcklbw()
3513 EmitXmmRegisterOperand(dst.LowBits(), src); in punpcklbw()
3517 void X86_64Assembler::punpcklwd(XmmRegister dst, XmmRegister src) { in punpcklwd() argument
3520 EmitOptionalRex32(dst, src); in punpcklwd()
3523 EmitXmmRegisterOperand(dst.LowBits(), src); in punpcklwd()
3527 void X86_64Assembler::punpckldq(XmmRegister dst, XmmRegister src) { in punpckldq() argument
3530 EmitOptionalRex32(dst, src); in punpckldq()
3533 EmitXmmRegisterOperand(dst.LowBits(), src); in punpckldq()
3537 void X86_64Assembler::punpcklqdq(XmmRegister dst, XmmRegister src) { in punpcklqdq() argument
3540 EmitOptionalRex32(dst, src); in punpcklqdq()
3543 EmitXmmRegisterOperand(dst.LowBits(), src); in punpcklqdq()
3547 void X86_64Assembler::punpckhbw(XmmRegister dst, XmmRegister src) { in punpckhbw() argument
3550 EmitOptionalRex32(dst, src); in punpckhbw()
3553 EmitXmmRegisterOperand(dst.LowBits(), src); in punpckhbw()
3557 void X86_64Assembler::punpckhwd(XmmRegister dst, XmmRegister src) { in punpckhwd() argument
3560 EmitOptionalRex32(dst, src); in punpckhwd()
3563 EmitXmmRegisterOperand(dst.LowBits(), src); in punpckhwd()
3567 void X86_64Assembler::punpckhdq(XmmRegister dst, XmmRegister src) { in punpckhdq() argument
3570 EmitOptionalRex32(dst, src); in punpckhdq()
3573 EmitXmmRegisterOperand(dst.LowBits(), src); in punpckhdq()
3577 void X86_64Assembler::punpckhqdq(XmmRegister dst, XmmRegister src) { in punpckhqdq() argument
3580 EmitOptionalRex32(dst, src); in punpckhqdq()
3583 EmitXmmRegisterOperand(dst.LowBits(), src); in punpckhqdq()
3702 void X86_64Assembler::fstl(const Address& dst) { in fstl() argument
3705 EmitOperand(2, dst); in fstl()
3709 void X86_64Assembler::fstpl(const Address& dst) { in fstpl() argument
3712 EmitOperand(3, dst); in fstpl()
3724 void X86_64Assembler::fnstcw(const Address& dst) { in fnstcw() argument
3727 EmitOperand(7, dst); in fnstcw()
3738 void X86_64Assembler::fistpl(const Address& dst) { in fistpl() argument
3741 EmitOperand(7, dst); in fistpl()
3745 void X86_64Assembler::fistps(const Address& dst) { in fistps() argument
3748 EmitOperand(3, dst); in fistps()
3815 void X86_64Assembler::xchgl(CpuRegister dst, CpuRegister src) { in xchgl() argument
3821 const bool dst_rax = dst.AsRegister() == RAX; in xchgl()
3823 EmitOptionalRex32(src_rax ? dst : src); in xchgl()
3824 EmitUint8(0x90 + (src_rax ? dst.LowBits() : src.LowBits())); in xchgl()
3829 EmitOptionalRex32(src, dst); in xchgl()
3831 EmitRegisterOperand(src.LowBits(), dst.LowBits()); in xchgl()
3835 void X86_64Assembler::xchgq(CpuRegister dst, CpuRegister src) { in xchgq() argument
3841 const bool dst_rax = dst.AsRegister() == RAX; in xchgq()
3847 EmitRex64(src_rax ? dst : src); in xchgq()
3848 EmitUint8(0x90 + (src_rax ? dst.LowBits() : src.LowBits())); in xchgq()
3854 EmitRex64(src, dst); in xchgq()
3856 EmitRegisterOperand(src.LowBits(), dst.LowBits()); in xchgq()
3959 void X86_64Assembler::addl(CpuRegister dst, CpuRegister src) { in addl() argument
3961 EmitOptionalRex32(dst, src); in addl()
3963 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in addl()
4033 void X86_64Assembler::testb(const Address& dst, const Immediate& imm) { in testb() argument
4035 EmitOptionalRex32(dst); in testb()
4037 EmitOperand(Register::RAX, dst); in testb()
4043 void X86_64Assembler::testl(const Address& dst, const Immediate& imm) { in testl() argument
4045 EmitOptionalRex32(dst); in testl()
4047 EmitOperand(0, dst); in testl()
4052 void X86_64Assembler::andl(CpuRegister dst, CpuRegister src) { in andl() argument
4054 EmitOptionalRex32(dst, src); in andl()
4056 EmitOperand(dst.LowBits(), Operand(src)); in andl()
4068 void X86_64Assembler::andl(CpuRegister dst, const Immediate& imm) { in andl() argument
4070 EmitOptionalRex32(dst); in andl()
4071 EmitComplex(4, Operand(dst), imm); in andl()
4083 void X86_64Assembler::andq(CpuRegister dst, CpuRegister src) { in andq() argument
4085 EmitRex64(dst, src); in andq()
4087 EmitOperand(dst.LowBits(), Operand(src)); in andq()
4091 void X86_64Assembler::andq(CpuRegister dst, const Address& src) { in andq() argument
4093 EmitRex64(dst, src); in andq()
4095 EmitOperand(dst.LowBits(), src); in andq()
4099 void X86_64Assembler::orl(CpuRegister dst, CpuRegister src) { in orl() argument
4101 EmitOptionalRex32(dst, src); in orl()
4103 EmitOperand(dst.LowBits(), Operand(src)); in orl()
4115 void X86_64Assembler::orl(CpuRegister dst, const Immediate& imm) { in orl() argument
4117 EmitOptionalRex32(dst); in orl()
4118 EmitComplex(1, Operand(dst), imm); in orl()
4122 void X86_64Assembler::orq(CpuRegister dst, const Immediate& imm) { in orq() argument
4125 EmitRex64(dst); in orq()
4126 EmitComplex(1, Operand(dst), imm); in orq()
4130 void X86_64Assembler::orq(CpuRegister dst, CpuRegister src) { in orq() argument
4132 EmitRex64(dst, src); in orq()
4134 EmitOperand(dst.LowBits(), Operand(src)); in orq()
4138 void X86_64Assembler::orq(CpuRegister dst, const Address& src) { in orq() argument
4140 EmitRex64(dst, src); in orq()
4142 EmitOperand(dst.LowBits(), src); in orq()
4146 void X86_64Assembler::xorl(CpuRegister dst, CpuRegister src) { in xorl() argument
4148 EmitOptionalRex32(dst, src); in xorl()
4150 EmitOperand(dst.LowBits(), Operand(src)); in xorl()
4162 void X86_64Assembler::xorl(CpuRegister dst, const Immediate& imm) { in xorl() argument
4164 EmitOptionalRex32(dst); in xorl()
4165 EmitComplex(6, Operand(dst), imm); in xorl()
4169 void X86_64Assembler::xorq(CpuRegister dst, CpuRegister src) { in xorq() argument
4171 EmitRex64(dst, src); in xorq()
4173 EmitOperand(dst.LowBits(), Operand(src)); in xorq()
4177 void X86_64Assembler::xorq(CpuRegister dst, const Immediate& imm) { in xorq() argument
4180 EmitRex64(dst); in xorq()
4181 EmitComplex(6, Operand(dst), imm); in xorq()
4184 void X86_64Assembler::xorq(CpuRegister dst, const Address& src) { in xorq() argument
4186 EmitRex64(dst, src); in xorq()
4188 EmitOperand(dst.LowBits(), src); in xorq()
4220 void X86_64Assembler::rex_reg_mem(bool force, bool w, Register* dst, const Address& mem) {
4233 if (dst != nullptr && *dst >= Register::R8 && *dst < Register::kNumberOfCpuRegisters) {
4235 *dst = static_cast<Register>(*dst - 8);
4260 void X86_64Assembler::addq(CpuRegister dst, const Address& address) { in addq() argument
4262 EmitRex64(dst, address); in addq()
4264 EmitOperand(dst.LowBits(), address); in addq()
4268 void X86_64Assembler::addq(CpuRegister dst, CpuRegister src) { in addq() argument
4271 EmitRex64(src, dst); in addq()
4273 EmitRegisterOperand(src.LowBits(), dst.LowBits()); in addq()
4301 void X86_64Assembler::subl(CpuRegister dst, CpuRegister src) { in subl() argument
4303 EmitOptionalRex32(dst, src); in subl()
4305 EmitOperand(dst.LowBits(), Operand(src)); in subl()
4324 void X86_64Assembler::subq(CpuRegister dst, CpuRegister src) { in subq() argument
4326 EmitRex64(dst, src); in subq()
4328 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in subq()
4393 void X86_64Assembler::imull(CpuRegister dst, CpuRegister src) { in imull() argument
4395 EmitOptionalRex32(dst, src); in imull()
4398 EmitOperand(dst.LowBits(), Operand(src)); in imull()
4401 void X86_64Assembler::imull(CpuRegister dst, CpuRegister src, const Immediate& imm) { in imull() argument
4405 EmitOptionalRex32(dst, src); in imull()
4412 EmitOperand(dst.LowBits(), Operand(src)); in imull()
4417 EmitOperand(dst.LowBits(), Operand(src)); in imull()
4437 void X86_64Assembler::imulq(CpuRegister dst, CpuRegister src) { in imulq() argument
4439 EmitRex64(dst, src); in imulq()
4442 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in imulq()
4450 void X86_64Assembler::imulq(CpuRegister dst, CpuRegister reg, const Immediate& imm) { in imulq() argument
4454 EmitRex64(dst, reg); in imulq()
4461 EmitOperand(dst.LowBits(), Operand(reg)); in imulq()
4466 EmitOperand(dst.LowBits(), Operand(reg)); in imulq()
4869 void X86_64Assembler::setcc(Condition condition, CpuRegister dst) { in setcc() argument
4872 if (dst.NeedsRex() || dst.AsRegister() > 3) { in setcc()
4873 EmitOptionalRex(true, false, false, false, dst.NeedsRex()); in setcc()
4877 EmitUint8(0xC0 + dst.LowBits()); in setcc()
4880 void X86_64Assembler::blsi(CpuRegister dst, CpuRegister src) { in blsi() argument
4888 X86_64ManagedRegister::FromCpuRegister(dst.AsRegister()), in blsi()
4898 void X86_64Assembler::blsmsk(CpuRegister dst, CpuRegister src) { in blsmsk() argument
4906 X86_64ManagedRegister::FromCpuRegister(dst.AsRegister()), in blsmsk()
4916 void X86_64Assembler::blsr(CpuRegister dst, CpuRegister src) { in blsr() argument
4924 X86_64ManagedRegister::FromCpuRegister(dst.AsRegister()), in blsr()
4934 void X86_64Assembler::bswapl(CpuRegister dst) { in bswapl() argument
4936 EmitOptionalRex(false, false, false, false, dst.NeedsRex()); in bswapl()
4938 EmitUint8(0xC8 + dst.LowBits()); in bswapl()
4941 void X86_64Assembler::bswapq(CpuRegister dst) { in bswapq() argument
4943 EmitOptionalRex(false, true, false, false, dst.NeedsRex()); in bswapq()
4945 EmitUint8(0xC8 + dst.LowBits()); in bswapq()
4948 void X86_64Assembler::bsfl(CpuRegister dst, CpuRegister src) { in bsfl() argument
4950 EmitOptionalRex32(dst, src); in bsfl()
4953 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in bsfl()
4956 void X86_64Assembler::bsfl(CpuRegister dst, const Address& src) { in bsfl() argument
4958 EmitOptionalRex32(dst, src); in bsfl()
4961 EmitOperand(dst.LowBits(), src); in bsfl()
4964 void X86_64Assembler::bsfq(CpuRegister dst, CpuRegister src) { in bsfq() argument
4966 EmitRex64(dst, src); in bsfq()
4969 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in bsfq()
4972 void X86_64Assembler::bsfq(CpuRegister dst, const Address& src) { in bsfq() argument
4974 EmitRex64(dst, src); in bsfq()
4977 EmitOperand(dst.LowBits(), src); in bsfq()
4980 void X86_64Assembler::bsrl(CpuRegister dst, CpuRegister src) { in bsrl() argument
4982 EmitOptionalRex32(dst, src); in bsrl()
4985 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in bsrl()
4988 void X86_64Assembler::bsrl(CpuRegister dst, const Address& src) { in bsrl() argument
4990 EmitOptionalRex32(dst, src); in bsrl()
4993 EmitOperand(dst.LowBits(), src); in bsrl()
4996 void X86_64Assembler::bsrq(CpuRegister dst, CpuRegister src) { in bsrq() argument
4998 EmitRex64(dst, src); in bsrq()
5001 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in bsrq()
5004 void X86_64Assembler::bsrq(CpuRegister dst, const Address& src) { in bsrq() argument
5006 EmitRex64(dst, src); in bsrq()
5009 EmitOperand(dst.LowBits(), src); in bsrq()
5012 void X86_64Assembler::popcntl(CpuRegister dst, CpuRegister src) { in popcntl() argument
5015 EmitOptionalRex32(dst, src); in popcntl()
5018 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in popcntl()
5021 void X86_64Assembler::popcntl(CpuRegister dst, const Address& src) { in popcntl() argument
5024 EmitOptionalRex32(dst, src); in popcntl()
5027 EmitOperand(dst.LowBits(), src); in popcntl()
5030 void X86_64Assembler::popcntq(CpuRegister dst, CpuRegister src) { in popcntq() argument
5033 EmitRex64(dst, src); in popcntq()
5036 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in popcntq()
5039 void X86_64Assembler::popcntq(CpuRegister dst, const Address& src) { in popcntq() argument
5042 EmitRex64(dst, src); in popcntq()
5045 EmitOperand(dst.LowBits(), src); in popcntq()
5084 void X86_64Assembler::LoadDoubleConstant(XmmRegister dst, double value) { in LoadDoubleConstant() argument
5089 movsd(dst, Address(CpuRegister(RSP), 0)); in LoadDoubleConstant()
5284 void X86_64Assembler::EmitOptionalRex32(CpuRegister dst, CpuRegister src) { in EmitOptionalRex32() argument
5285 EmitOptionalRex(false, false, dst.NeedsRex(), false, src.NeedsRex()); in EmitOptionalRex32()
5288 void X86_64Assembler::EmitOptionalRex32(XmmRegister dst, XmmRegister src) { in EmitOptionalRex32() argument
5289 EmitOptionalRex(false, false, dst.NeedsRex(), false, src.NeedsRex()); in EmitOptionalRex32()
5292 void X86_64Assembler::EmitOptionalRex32(CpuRegister dst, XmmRegister src) { in EmitOptionalRex32() argument
5293 EmitOptionalRex(false, false, dst.NeedsRex(), false, src.NeedsRex()); in EmitOptionalRex32()
5296 void X86_64Assembler::EmitOptionalRex32(XmmRegister dst, CpuRegister src) { in EmitOptionalRex32() argument
5297 EmitOptionalRex(false, false, dst.NeedsRex(), false, src.NeedsRex()); in EmitOptionalRex32()
5307 void X86_64Assembler::EmitOptionalRex32(CpuRegister dst, const Operand& operand) { in EmitOptionalRex32() argument
5309 if (dst.NeedsRex()) { in EmitOptionalRex32()
5317 void X86_64Assembler::EmitOptionalRex32(XmmRegister dst, const Operand& operand) { in EmitOptionalRex32() argument
5319 if (dst.NeedsRex()) { in EmitOptionalRex32()
5341 void X86_64Assembler::EmitRex64(CpuRegister dst, CpuRegister src) { in EmitRex64() argument
5342 EmitOptionalRex(false, true, dst.NeedsRex(), false, src.NeedsRex()); in EmitRex64()
5345 void X86_64Assembler::EmitRex64(XmmRegister dst, CpuRegister src) { in EmitRex64() argument
5346 EmitOptionalRex(false, true, dst.NeedsRex(), false, src.NeedsRex()); in EmitRex64()
5349 void X86_64Assembler::EmitRex64(CpuRegister dst, XmmRegister src) { in EmitRex64() argument
5350 EmitOptionalRex(false, true, dst.NeedsRex(), false, src.NeedsRex()); in EmitRex64()
5353 void X86_64Assembler::EmitRex64(CpuRegister dst, const Operand& operand) { in EmitRex64() argument
5355 if (dst.NeedsRex()) { in EmitRex64()
5361 void X86_64Assembler::EmitRex64(XmmRegister dst, const Operand& operand) { in EmitRex64() argument
5363 if (dst.NeedsRex()) { in EmitRex64()
5369 void X86_64Assembler::EmitOptionalByteRegNormalizingRex32(CpuRegister dst, CpuRegister src) { in EmitOptionalByteRegNormalizingRex32() argument
5372 EmitOptionalRex(force, false, dst.NeedsRex(), false, src.NeedsRex()); in EmitOptionalByteRegNormalizingRex32()
5375 void X86_64Assembler::EmitOptionalByteRegNormalizingRex32(CpuRegister dst, const Operand& operand) { in EmitOptionalByteRegNormalizingRex32() argument
5378 bool force = dst.AsRegister() > 3; in EmitOptionalByteRegNormalizingRex32()
5382 if (dst.NeedsRex()) { in EmitOptionalByteRegNormalizingRex32()