138   void SetSIB(ScaleFactor scale_in, CpuRegister index_in, CpuRegister base_in) {  in SetSIB()  argument
141     if (base_in.NeedsRex()) {  in SetSIB()
148         static_cast<uint8_t>(base_in.LowBits());  in SetSIB()
189   Address(CpuRegister base_in, int32_t disp) {  in Address()  argument
190     Init(base_in, disp);  in Address()
193   Address(CpuRegister base_in, Offset disp) {  in Address()  argument
194     Init(base_in, disp.Int32Value());  in Address()
197   Address(CpuRegister base_in, FrameOffset disp) {  in Address()  argument
198     CHECK_EQ(base_in.AsRegister(), RSP);  in Address()
202   Address(CpuRegister base_in, MemberOffset disp) {  in Address()  argument
203     Init(base_in, disp.Int32Value());  in Address()
206   void Init(CpuRegister base_in, int32_t disp) {  in Init()  argument
207     if (disp == 0 && base_in.LowBits() != RBP) {  in Init()
208       SetModRM(0, base_in);  in Init()
209       if (base_in.LowBits() == RSP) {  in Init()
210         SetSIB(TIMES_1, CpuRegister(RSP), base_in);  in Init()
213       SetModRM(1, base_in);  in Init()
214       if (base_in.LowBits() == RSP) {  in Init()
215         SetSIB(TIMES_1, CpuRegister(RSP), base_in);  in Init()
219       SetModRM(2, base_in);  in Init()
220       if (base_in.LowBits() == RSP) {  in Init()
221         SetSIB(TIMES_1, CpuRegister(RSP), base_in);  in Init()
235   Address(CpuRegister base_in, CpuRegister index_in, ScaleFactor scale_in, int32_t disp) {  in Address()  argument
237     if (disp == 0 && base_in.LowBits() != RBP) {  in Address()
239       SetSIB(scale_in, index_in, base_in);  in Address()
242       SetSIB(scale_in, index_in, base_in);  in Address()
246       SetSIB(scale_in, index_in, base_in);  in Address()