Lines Matching refs:dst
379 void movq(CpuRegister dst, const Immediate& src);
380 void movl(CpuRegister dst, const Immediate& src);
381 void movq(CpuRegister dst, CpuRegister src);
382 void movl(CpuRegister dst, CpuRegister src);
384 void movntl(const Address& dst, CpuRegister src);
385 void movntq(const Address& dst, CpuRegister src);
387 void movq(CpuRegister dst, const Address& src);
388 void movl(CpuRegister dst, const Address& src);
389 void movq(const Address& dst, CpuRegister src);
390 void movq(const Address& dst, const Immediate& imm);
391 void movl(const Address& dst, CpuRegister src);
392 void movl(const Address& dst, const Immediate& imm);
394 void cmov(Condition c, CpuRegister dst, CpuRegister src); // This is the 64b version.
395 void cmov(Condition c, CpuRegister dst, CpuRegister src, bool is64bit);
396 void cmov(Condition c, CpuRegister dst, const Address& src, bool is64bit);
398 void movzxb(CpuRegister dst, CpuRegister src);
399 void movzxb(CpuRegister dst, const Address& src);
400 void movsxb(CpuRegister dst, CpuRegister src);
401 void movsxb(CpuRegister dst, const Address& src);
402 void movb(CpuRegister dst, const Address& src);
403 void movb(const Address& dst, CpuRegister src);
404 void movb(const Address& dst, const Immediate& imm);
406 void movzxw(CpuRegister dst, CpuRegister src);
407 void movzxw(CpuRegister dst, const Address& src);
408 void movsxw(CpuRegister dst, CpuRegister src);
409 void movsxw(CpuRegister dst, const Address& src);
410 void movw(CpuRegister dst, const Address& src);
411 void movw(const Address& dst, CpuRegister src);
412 void movw(const Address& dst, const Immediate& imm);
414 void leaq(CpuRegister dst, const Address& src);
415 void leal(CpuRegister dst, const Address& src);
417 void movaps(XmmRegister dst, XmmRegister src); // move
418 void movaps(XmmRegister dst, const Address& src); // load aligned
419 void movups(XmmRegister dst, const Address& src); // load unaligned
420 void movaps(const Address& dst, XmmRegister src); // store aligned
421 void movups(const Address& dst, XmmRegister src); // store unaligned
423 void vmovaps(XmmRegister dst, XmmRegister src); // move
424 void vmovaps(XmmRegister dst, const Address& src); // load aligned
425 void vmovaps(const Address& dst, XmmRegister src); // store aligned
426 void vmovups(XmmRegister dst, const Address& src); // load unaligned
427 void vmovups(const Address& dst, XmmRegister src); // store unaligned
429 void movss(XmmRegister dst, const Address& src);
430 void movss(const Address& dst, XmmRegister src);
431 void movss(XmmRegister dst, XmmRegister src);
433 void movsxd(CpuRegister dst, CpuRegister src);
434 void movsxd(CpuRegister dst, const Address& src);
436 void movd(XmmRegister dst, CpuRegister src); // Note: this is the r64 version, formally movq.
437 void movd(CpuRegister dst, XmmRegister src); // Note: this is the r64 version, formally movq.
438 void movd(XmmRegister dst, CpuRegister src, bool is64bit);
439 void movd(CpuRegister dst, XmmRegister src, bool is64bit);
441 void addss(XmmRegister dst, XmmRegister src);
442 void addss(XmmRegister dst, const Address& src);
443 void subss(XmmRegister dst, XmmRegister src);
444 void subss(XmmRegister dst, const Address& src);
445 void mulss(XmmRegister dst, XmmRegister src);
446 void mulss(XmmRegister dst, const Address& src);
447 void divss(XmmRegister dst, XmmRegister src);
448 void divss(XmmRegister dst, const Address& src);
450 void addps(XmmRegister dst, XmmRegister src); // no addr variant (for now)
451 void subps(XmmRegister dst, XmmRegister src);
452 void mulps(XmmRegister dst, XmmRegister src);
453 void divps(XmmRegister dst, XmmRegister src);
455 void vmulps(XmmRegister dst, XmmRegister src1, XmmRegister src2);
456 void vmulpd(XmmRegister dst, XmmRegister src1, XmmRegister src2);
457 void vdivps(XmmRegister dst, XmmRegister src1, XmmRegister src2);
458 void vdivpd(XmmRegister dst, XmmRegister src1, XmmRegister src2);
460 void vaddps(XmmRegister dst, XmmRegister add_left, XmmRegister add_right);
461 void vsubps(XmmRegister dst, XmmRegister add_left, XmmRegister add_right);
462 void vsubpd(XmmRegister dst, XmmRegister add_left, XmmRegister add_right);
463 void vaddpd(XmmRegister dst, XmmRegister add_left, XmmRegister add_right);
465 void movapd(XmmRegister dst, XmmRegister src); // move
466 void movapd(XmmRegister dst, const Address& src); // load aligned
467 void movupd(XmmRegister dst, const Address& src); // load unaligned
468 void movapd(const Address& dst, XmmRegister src); // store aligned
469 void movupd(const Address& dst, XmmRegister src); // store unaligned
471 void vmovapd(XmmRegister dst, XmmRegister src); // move
472 void vmovapd(XmmRegister dst, const Address& src); // load aligned
473 void vmovapd(const Address& dst, XmmRegister src); // store aligned
474 void vmovupd(XmmRegister dst, const Address& src); // load unaligned
475 void vmovupd(const Address& dst, XmmRegister src); // store unaligned
477 void movsd(XmmRegister dst, const Address& src);
478 void movsd(const Address& dst, XmmRegister src);
479 void movsd(XmmRegister dst, XmmRegister src);
481 void addsd(XmmRegister dst, XmmRegister src);
482 void addsd(XmmRegister dst, const Address& src);
483 void subsd(XmmRegister dst, XmmRegister src);
484 void subsd(XmmRegister dst, const Address& src);
485 void mulsd(XmmRegister dst, XmmRegister src);
486 void mulsd(XmmRegister dst, const Address& src);
487 void divsd(XmmRegister dst, XmmRegister src);
488 void divsd(XmmRegister dst, const Address& src);
490 void addpd(XmmRegister dst, XmmRegister src); // no addr variant (for now)
491 void subpd(XmmRegister dst, XmmRegister src);
492 void mulpd(XmmRegister dst, XmmRegister src);
493 void divpd(XmmRegister dst, XmmRegister src);
495 void movdqa(XmmRegister dst, XmmRegister src); // move
496 void movdqa(XmmRegister dst, const Address& src); // load aligned
497 void movdqu(XmmRegister dst, const Address& src); // load unaligned
498 void movdqa(const Address& dst, XmmRegister src); // store aligned
499 void movdqu(const Address& dst, XmmRegister src); // store unaligned
501 void vmovdqa(XmmRegister dst, XmmRegister src); // move
502 void vmovdqa(XmmRegister dst, const Address& src); // load aligned
503 void vmovdqa(const Address& dst, XmmRegister src); // store aligned
504 void vmovdqu(XmmRegister dst, const Address& src); // load unaligned
505 void vmovdqu(const Address& dst, XmmRegister src); // store unaligned
507 void paddb(XmmRegister dst, XmmRegister src); // no addr variant (for now)
508 void psubb(XmmRegister dst, XmmRegister src);
510 void vpaddb(XmmRegister dst, XmmRegister add_left, XmmRegister add_right);
511 void vpaddw(XmmRegister dst, XmmRegister add_left, XmmRegister add_right);
513 void paddw(XmmRegister dst, XmmRegister src);
514 void psubw(XmmRegister dst, XmmRegister src);
515 void pmullw(XmmRegister dst, XmmRegister src);
516 void vpmullw(XmmRegister dst, XmmRegister src1, XmmRegister src2);
518 void vpsubb(XmmRegister dst, XmmRegister src1, XmmRegister src2);
519 void vpsubw(XmmRegister dst, XmmRegister src1, XmmRegister src2);
520 void vpsubd(XmmRegister dst, XmmRegister src1, XmmRegister src2);
522 void paddd(XmmRegister dst, XmmRegister src);
523 void psubd(XmmRegister dst, XmmRegister src);
524 void pmulld(XmmRegister dst, XmmRegister src);
525 void vpmulld(XmmRegister dst, XmmRegister src1, XmmRegister src2);
527 void vpaddd(XmmRegister dst, XmmRegister src1, XmmRegister src2);
529 void paddq(XmmRegister dst, XmmRegister src);
530 void psubq(XmmRegister dst, XmmRegister src);
532 void vpaddq(XmmRegister dst, XmmRegister add_left, XmmRegister add_right);
533 void vpsubq(XmmRegister dst, XmmRegister add_left, XmmRegister add_right);
535 void paddusb(XmmRegister dst, XmmRegister src);
536 void paddsb(XmmRegister dst, XmmRegister src);
537 void paddusw(XmmRegister dst, XmmRegister src);
538 void paddsw(XmmRegister dst, XmmRegister src);
539 void psubusb(XmmRegister dst, XmmRegister src);
540 void psubsb(XmmRegister dst, XmmRegister src);
541 void psubusw(XmmRegister dst, XmmRegister src);
542 void psubsw(XmmRegister dst, XmmRegister src);
544 void cvtsi2ss(XmmRegister dst, CpuRegister src); // Note: this is the r/m32 version.
545 void cvtsi2ss(XmmRegister dst, CpuRegister src, bool is64bit);
546 void cvtsi2ss(XmmRegister dst, const Address& src, bool is64bit);
547 void cvtsi2sd(XmmRegister dst, CpuRegister src); // Note: this is the r/m32 version.
548 void cvtsi2sd(XmmRegister dst, CpuRegister src, bool is64bit);
549 void cvtsi2sd(XmmRegister dst, const Address& src, bool is64bit);
551 void cvtss2si(CpuRegister dst, XmmRegister src); // Note: this is the r32 version.
552 void cvtss2sd(XmmRegister dst, XmmRegister src);
553 void cvtss2sd(XmmRegister dst, const Address& src);
555 void cvtsd2si(CpuRegister dst, XmmRegister src); // Note: this is the r32 version.
556 void cvtsd2ss(XmmRegister dst, XmmRegister src);
557 void cvtsd2ss(XmmRegister dst, const Address& src);
559 void cvttss2si(CpuRegister dst, XmmRegister src); // Note: this is the r32 version.
560 void cvttss2si(CpuRegister dst, XmmRegister src, bool is64bit);
561 void cvttsd2si(CpuRegister dst, XmmRegister src); // Note: this is the r32 version.
562 void cvttsd2si(CpuRegister dst, XmmRegister src, bool is64bit);
564 void cvtdq2ps(XmmRegister dst, XmmRegister src);
565 void cvtdq2pd(XmmRegister dst, XmmRegister src);
576 void roundsd(XmmRegister dst, XmmRegister src, const Immediate& imm);
577 void roundss(XmmRegister dst, XmmRegister src, const Immediate& imm);
579 void sqrtsd(XmmRegister dst, XmmRegister src);
580 void sqrtss(XmmRegister dst, XmmRegister src);
582 void xorpd(XmmRegister dst, const Address& src);
583 void xorpd(XmmRegister dst, XmmRegister src);
584 void xorps(XmmRegister dst, const Address& src);
585 void xorps(XmmRegister dst, XmmRegister src);
586 void pxor(XmmRegister dst, XmmRegister src); // no addr variant (for now)
587 void vpxor(XmmRegister dst, XmmRegister src1, XmmRegister src2);
588 void vxorps(XmmRegister dst, XmmRegister src1, XmmRegister src2);
589 void vxorpd(XmmRegister dst, XmmRegister src1, XmmRegister src2);
591 void andpd(XmmRegister dst, const Address& src);
592 void andpd(XmmRegister dst, XmmRegister src);
593 void andps(XmmRegister dst, XmmRegister src); // no addr variant (for now)
594 void pand(XmmRegister dst, XmmRegister src);
595 void vpand(XmmRegister dst, XmmRegister src1, XmmRegister src2);
596 void vandps(XmmRegister dst, XmmRegister src1, XmmRegister src2);
597 void vandpd(XmmRegister dst, XmmRegister src1, XmmRegister src2);
599 void andn(CpuRegister dst, CpuRegister src1, CpuRegister src2);
600 void andnpd(XmmRegister dst, XmmRegister src); // no addr variant (for now)
601 void andnps(XmmRegister dst, XmmRegister src);
602 void pandn(XmmRegister dst, XmmRegister src);
603 void vpandn(XmmRegister dst, XmmRegister src1, XmmRegister src2);
604 void vandnps(XmmRegister dst, XmmRegister src1, XmmRegister src2);
605 void vandnpd(XmmRegister dst, XmmRegister src1, XmmRegister src2);
607 void orpd(XmmRegister dst, XmmRegister src); // no addr variant (for now)
608 void orps(XmmRegister dst, XmmRegister src);
609 void por(XmmRegister dst, XmmRegister src);
610 void vpor(XmmRegister dst, XmmRegister src1, XmmRegister src2);
611 void vorps(XmmRegister dst, XmmRegister src1, XmmRegister src2);
612 void vorpd(XmmRegister dst, XmmRegister src1, XmmRegister src2);
614 void pavgb(XmmRegister dst, XmmRegister src); // no addr variant (for now)
615 void pavgw(XmmRegister dst, XmmRegister src);
616 void psadbw(XmmRegister dst, XmmRegister src);
617 void pmaddwd(XmmRegister dst, XmmRegister src);
618 void vpmaddwd(XmmRegister dst, XmmRegister src1, XmmRegister src2);
619 void phaddw(XmmRegister dst, XmmRegister src);
620 void phaddd(XmmRegister dst, XmmRegister src);
621 void haddps(XmmRegister dst, XmmRegister src);
622 void haddpd(XmmRegister dst, XmmRegister src);
623 void phsubw(XmmRegister dst, XmmRegister src);
624 void phsubd(XmmRegister dst, XmmRegister src);
625 void hsubps(XmmRegister dst, XmmRegister src);
626 void hsubpd(XmmRegister dst, XmmRegister src);
628 void pminsb(XmmRegister dst, XmmRegister src); // no addr variant (for now)
629 void pmaxsb(XmmRegister dst, XmmRegister src);
630 void pminsw(XmmRegister dst, XmmRegister src);
631 void pmaxsw(XmmRegister dst, XmmRegister src);
632 void pminsd(XmmRegister dst, XmmRegister src);
633 void pmaxsd(XmmRegister dst, XmmRegister src);
635 void pminub(XmmRegister dst, XmmRegister src); // no addr variant (for now)
636 void pmaxub(XmmRegister dst, XmmRegister src);
637 void pminuw(XmmRegister dst, XmmRegister src);
638 void pmaxuw(XmmRegister dst, XmmRegister src);
639 void pminud(XmmRegister dst, XmmRegister src);
640 void pmaxud(XmmRegister dst, XmmRegister src);
642 void minps(XmmRegister dst, XmmRegister src); // no addr variant (for now)
643 void maxps(XmmRegister dst, XmmRegister src);
644 void minpd(XmmRegister dst, XmmRegister src);
645 void maxpd(XmmRegister dst, XmmRegister src);
647 void pcmpeqb(XmmRegister dst, XmmRegister src);
648 void pcmpeqw(XmmRegister dst, XmmRegister src);
649 void pcmpeqd(XmmRegister dst, XmmRegister src);
650 void pcmpeqq(XmmRegister dst, XmmRegister src);
652 void pcmpgtb(XmmRegister dst, XmmRegister src);
653 void pcmpgtw(XmmRegister dst, XmmRegister src);
654 void pcmpgtd(XmmRegister dst, XmmRegister src);
655 void pcmpgtq(XmmRegister dst, XmmRegister src); // SSE4.2
657 void shufpd(XmmRegister dst, XmmRegister src, const Immediate& imm);
658 void shufps(XmmRegister dst, XmmRegister src, const Immediate& imm);
659 void pshufd(XmmRegister dst, XmmRegister src, const Immediate& imm);
661 void punpcklbw(XmmRegister dst, XmmRegister src);
662 void punpcklwd(XmmRegister dst, XmmRegister src);
663 void punpckldq(XmmRegister dst, XmmRegister src);
664 void punpcklqdq(XmmRegister dst, XmmRegister src);
666 void punpckhbw(XmmRegister dst, XmmRegister src);
667 void punpckhwd(XmmRegister dst, XmmRegister src);
668 void punpckhdq(XmmRegister dst, XmmRegister src);
669 void punpckhqdq(XmmRegister dst, XmmRegister src);
685 void fstps(const Address& dst);
686 void fsts(const Address& dst);
689 void fstpl(const Address& dst);
690 void fstl(const Address& dst);
696 void fnstcw(const Address& dst);
699 void fistpl(const Address& dst);
700 void fistps(const Address& dst);
712 void xchgl(CpuRegister dst, CpuRegister src);
713 void xchgq(CpuRegister dst, CpuRegister src);
740 void andl(CpuRegister dst, const Immediate& imm);
741 void andl(CpuRegister dst, CpuRegister src);
743 void andq(CpuRegister dst, const Immediate& imm);
744 void andq(CpuRegister dst, CpuRegister src);
747 void orl(CpuRegister dst, const Immediate& imm);
748 void orl(CpuRegister dst, CpuRegister src);
750 void orq(CpuRegister dst, CpuRegister src);
751 void orq(CpuRegister dst, const Immediate& imm);
754 void xorl(CpuRegister dst, CpuRegister src);
755 void xorl(CpuRegister dst, const Immediate& imm);
757 void xorq(CpuRegister dst, const Immediate& imm);
758 void xorq(CpuRegister dst, CpuRegister src);
761 void addl(CpuRegister dst, CpuRegister src);
769 void addq(CpuRegister dst, CpuRegister src);
770 void addq(CpuRegister dst, const Address& address);
772 void subl(CpuRegister dst, CpuRegister src);
777 void subq(CpuRegister dst, CpuRegister src);
778 void subq(CpuRegister dst, const Address& address);
788 void imull(CpuRegister dst, CpuRegister src);
790 void imull(CpuRegister dst, CpuRegister src, const Immediate& imm);
794 void imulq(CpuRegister dst, CpuRegister src);
797 void imulq(CpuRegister dst, CpuRegister reg, const Immediate& imm);
852 void setcc(Condition condition, CpuRegister dst);
854 void bswapl(CpuRegister dst);
855 void bswapq(CpuRegister dst);
857 void bsfl(CpuRegister dst, CpuRegister src);
858 void bsfl(CpuRegister dst, const Address& src);
859 void bsfq(CpuRegister dst, CpuRegister src);
860 void bsfq(CpuRegister dst, const Address& src);
862 void blsi(CpuRegister dst, CpuRegister src); // no addr variant (for now)
863 void blsmsk(CpuRegister dst, CpuRegister src); // no addr variant (for now)
864 void blsr(CpuRegister dst, CpuRegister src); // no addr variant (for now)
866 void bsrl(CpuRegister dst, CpuRegister src);
867 void bsrl(CpuRegister dst, const Address& src);
868 void bsrq(CpuRegister dst, CpuRegister src);
869 void bsrq(CpuRegister dst, const Address& src);
871 void popcntl(CpuRegister dst, CpuRegister src);
872 void popcntl(CpuRegister dst, const Address& src);
873 void popcntq(CpuRegister dst, CpuRegister src);
874 void popcntq(CpuRegister dst, const Address& src);
899 void LoadDoubleConstant(XmmRegister dst, double value);
1001 void EmitOptionalRex32(CpuRegister dst, CpuRegister src);
1002 void EmitOptionalRex32(XmmRegister dst, XmmRegister src);
1003 void EmitOptionalRex32(CpuRegister dst, XmmRegister src);
1004 void EmitOptionalRex32(XmmRegister dst, CpuRegister src);
1006 void EmitOptionalRex32(CpuRegister dst, const Operand& operand);
1007 void EmitOptionalRex32(XmmRegister dst, const Operand& operand);
1013 void EmitRex64(CpuRegister dst, CpuRegister src);
1014 void EmitRex64(CpuRegister dst, const Operand& operand);
1015 void EmitRex64(XmmRegister dst, const Operand& operand);
1016 void EmitRex64(XmmRegister dst, CpuRegister src);
1017 void EmitRex64(CpuRegister dst, XmmRegister src);
1020 void EmitOptionalByteRegNormalizingRex32(CpuRegister dst, CpuRegister src);
1021 void EmitOptionalByteRegNormalizingRex32(CpuRegister dst, const Operand& operand);