Lines Matching defs:inst_data

95 inline int32_t Instruction::VRegA(Format format, uint16_t inst_data) const {  in VRegA()
130 inline int8_t Instruction::VRegA_10t(uint16_t inst_data) const { in VRegA_10t()
135 inline uint8_t Instruction::VRegA_10x(uint16_t inst_data) const { in VRegA_10x()
140 inline uint4_t Instruction::VRegA_11n(uint16_t inst_data) const { in VRegA_11n()
145 inline uint8_t Instruction::VRegA_11x(uint16_t inst_data) const { in VRegA_11x()
150 inline uint4_t Instruction::VRegA_12x(uint16_t inst_data) const { in VRegA_12x()
160 inline uint8_t Instruction::VRegA_21c(uint16_t inst_data) const { in VRegA_21c()
165 inline uint8_t Instruction::VRegA_21h(uint16_t inst_data) const { in VRegA_21h()
170 inline uint8_t Instruction::VRegA_21s(uint16_t inst_data) const { in VRegA_21s()
175 inline uint8_t Instruction::VRegA_21t(uint16_t inst_data) const { in VRegA_21t()
180 inline uint8_t Instruction::VRegA_22b(uint16_t inst_data) const { in VRegA_22b()
185 inline uint4_t Instruction::VRegA_22c(uint16_t inst_data) const { in VRegA_22c()
190 inline uint4_t Instruction::VRegA_22s(uint16_t inst_data) const { in VRegA_22s()
195 inline uint4_t Instruction::VRegA_22t(uint16_t inst_data) const { in VRegA_22t()
200 inline uint8_t Instruction::VRegA_22x(uint16_t inst_data) const { in VRegA_22x()
205 inline uint8_t Instruction::VRegA_23x(uint16_t inst_data) const { in VRegA_23x()
215 inline uint8_t Instruction::VRegA_31c(uint16_t inst_data) const { in VRegA_31c()
220 inline uint8_t Instruction::VRegA_31i(uint16_t inst_data) const { in VRegA_31i()
225 inline uint8_t Instruction::VRegA_31t(uint16_t inst_data) const { in VRegA_31t()
235 inline uint4_t Instruction::VRegA_35c(uint16_t inst_data) const { in VRegA_35c()
240 inline uint8_t Instruction::VRegA_3rc(uint16_t inst_data) const { in VRegA_3rc()
245 inline uint8_t Instruction::VRegA_51l(uint16_t inst_data) const { in VRegA_51l()
250 inline uint4_t Instruction::VRegA_45cc(uint16_t inst_data) const { in VRegA_45cc()
255 inline uint8_t Instruction::VRegA_4rcc(uint16_t inst_data) const { in VRegA_4rcc()
298 inline int32_t Instruction::VRegB(Format format, uint16_t inst_data) const { in VRegB()
332 inline int4_t Instruction::VRegB_11n(uint16_t inst_data) const { in VRegB_11n()
337 inline uint4_t Instruction::VRegB_12x(uint16_t inst_data) const { in VRegB_12x()
367 inline uint4_t Instruction::VRegB_22c(uint16_t inst_data) const { in VRegB_22c()
372 inline uint4_t Instruction::VRegB_22s(uint16_t inst_data) const { in VRegB_22s()
377 inline uint4_t Instruction::VRegB_22t(uint16_t inst_data) const { in VRegB_22t()
558 inline uint32_t Instruction::GetVarArgs(uint32_t arg[kMaxVarArgRegs], uint16_t inst_data) const { in GetVarArgs()