Lines Matching refs:ip

132     .cfi_rel_offset ip, 48
570 ands ip, r2, #LOCK_WORD_GC_STATE_MASK_SHIFTED_TOGGLED @ Test the non-gc bits.
733 push {r0-r3, ip, lr} @ 6 words for saved registers (used in art_quick_aput_obj)
739 .cfi_rel_offset ip, 16
759 POP_REG_NE ip, 16, \rDest
784 READ_BARRIER ip, r2, MIRROR_OBJECT_CLASS_OFFSET
786 cmp r3, ip @ value's type == array's component type - trivial assignability
807 mov r1, ip
1540 mov r0, ip // Pass method index.
1613 pop {r0-r3, r4, ip}
1616 mov sp, ip
1662 ldr ip, [rSELF, #THREAD_TOP_QUICK_FRAME_OFFSET]
1663 add ip, ip, #-1 // Remove the GenericJNI tag. ADD/SUB writing directly to SP is UNPREDICTABLE.
1664 mov sp, ip
2135 ldr ip, [\reg, MIRROR_OBJECT_LOCK_WORD_OFFSET]
2136 tst ip, #LOCK_WORD_MARK_BIT_MASK_SHIFTED
2149 cmp ip, #(LOCK_WORD_STATE_FORWARDING_ADDRESS << LOCK_WORD_STATE_SHIFT)
2156 push {r0-r4, r9, ip, lr} @ save return address, core caller-save registers and ip
2164 .cfi_rel_offset ip, 24
2203 pop {r0-r4, r9, ip, lr} @ restore caller-save registers
2211 .cfi_restore ip
2217 lsl \reg, ip, #LOCK_WORD_STATE_FORWARDING_ADDRESS_SHIFT
2259 mov \reg, ip
2275 ldr ip, [ip, \index_reg, lsl #2] // 4 bytes.
2303 mov r0, ip // Pass the reference.
2309 mov ip, r0 // Move reference to ip in preparation for return switch.
2323 cmp ip, #0
2326 ldr rMR, [ip, #MIRROR_OBJECT_LOCK_WORD_OFFSET]
2350 lsl ip, rMR, #LOCK_WORD_STATE_FORWARDING_ADDRESS_SHIFT
2497 UNPOISON_HEAP_REF ip
2513 UNPOISON_HEAP_REF ip
2630 ldr ip, [r4, #INLINE_CACHE_CLASSES_OFFSET]
2631 cmp ip, r0
2633 cmp ip, #0
2635 ldrex ip, [r4, #INLINE_CACHE_CLASSES_OFFSET]
2636 cmp ip, #0
2638 strex ip, r0, [r4, #INLINE_CACHE_CLASSES_OFFSET]
2639 cmp ip, #0
2643 ldr ip, [r4, #INLINE_CACHE_CLASSES_OFFSET+4]
2644 cmp ip, r0
2646 cmp ip, #0
2648 ldrex ip, [r4, #INLINE_CACHE_CLASSES_OFFSET+4]
2649 cmp ip, #0
2651 strex ip, r0, [r4, #INLINE_CACHE_CLASSES_OFFSET+4]
2652 cmp ip, #0
2656 ldr ip, [r4, #INLINE_CACHE_CLASSES_OFFSET+8]
2657 cmp ip, r0
2659 cmp ip, #0
2661 ldrex ip, [r4, #INLINE_CACHE_CLASSES_OFFSET+8]
2662 cmp ip, #0
2664 strex ip, r0, [r4, #INLINE_CACHE_CLASSES_OFFSET+8]
2665 cmp ip, #0
2669 ldr ip, [r4, #INLINE_CACHE_CLASSES_OFFSET+12]
2670 cmp ip, r0
2672 cmp ip, #0
2674 ldrex ip, [r4, #INLINE_CACHE_CLASSES_OFFSET+12]
2675 cmp ip, #0
2677 strex ip, r0, [r4, #INLINE_CACHE_CLASSES_OFFSET+12]
2678 cmp ip, #0