Lines Matching refs:lsl
188 add \reg, xIBASE, \reg, lsl #${handler_size_bits}
346 lsl x14, x14, #2
355 add \refs, x14, ip2, lsl #2
358 add \fp, \refs, ip, lsl #2
602 add ip2, xREFS, x3, lsl #2 // pointer to first argument in reference array
603 add ip2, ip2, x2, lsl #2 // pointer to last argument in reference array
604 add x5, xFP, x3, lsl #2 // pointer to first argument in register array
605 add x6, x5, x2, lsl #2 // pointer to last argument in register array
716 add ip, ip, ip2, lsl #32
775 add \gpr_reg64, ip, ip2, lsl #32
1144 add ip, ip, ip2, lsl #4 // entry address within the cache
1515 lsl x8, ip2, #2 // x8 is now the offset for inputs into the registers array.
1979 add x1, xPC, xINST, lsl #1