Lines Matching refs:VeriFlowAnalysis

30 VeriFlowAnalysis::VeriFlowAnalysis(VeridexResolver* resolver,  in VeriFlowAnalysis()  function in art::VeriFlowAnalysis
38 void VeriFlowAnalysis::SetAsBranchTarget(uint32_t dex_pc) { in SetAsBranchTarget()
45 bool VeriFlowAnalysis::IsBranchTarget(uint32_t dex_pc) { in IsBranchTarget()
49 bool VeriFlowAnalysis::MergeRegisterValues(uint32_t dex_pc) { in MergeRegisterValues()
59 void VeriFlowAnalysis::SetVisited(uint32_t dex_pc) { in SetVisited()
63 void VeriFlowAnalysis::FindBranches() { in FindBranches()
106 void VeriFlowAnalysis::UpdateRegister(uint32_t dex_register, in UpdateRegister()
114 void VeriFlowAnalysis::UpdateRegister(uint32_t dex_register, const RegisterValue& value) { in UpdateRegister()
118 void VeriFlowAnalysis::UpdateRegister(uint32_t dex_register, const VeriClass* cls) { in UpdateRegister()
123 void VeriFlowAnalysis::UpdateRegister(uint32_t dex_register, int32_t value, const VeriClass* cls) { in UpdateRegister()
128 const RegisterValue& VeriFlowAnalysis::GetRegister(uint32_t dex_register) const { in GetRegister()
132 RegisterValue VeriFlowAnalysis::GetReturnType(uint32_t method_index) { in GetReturnType()
140 RegisterValue VeriFlowAnalysis::GetFieldType(uint32_t field_index) { in GetFieldType()
147 int VeriFlowAnalysis::GetBranchFlags(const Instruction& instruction) const { in GetBranchFlags()
190 void VeriFlowAnalysis::AnalyzeCode() { in AnalyzeCode()
236 void VeriFlowAnalysis::ProcessDexInstruction(const Instruction& instruction) { in ProcessDexInstruction()
665 void VeriFlowAnalysis::Run() { in Run()