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Searched refs:instruction (Results 51 – 75 of 140) sorted by relevance

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/art/compiler/optimizing/
Dscheduler_arm64.cc60 void SchedulingLatencyVisitorARM64::VisitArrayGet(HArrayGet* instruction) { in VisitArrayGet() argument
61 if (!instruction->GetArray()->IsIntermediateAddress()) { in VisitArrayGet()
146 void SchedulingLatencyVisitorARM64::VisitNewInstance(HNewInstance* instruction) { in VisitNewInstance() argument
147 if (instruction->IsStringAlloc()) { in VisitNewInstance()
155 void SchedulingLatencyVisitorARM64::VisitRem(HRem* instruction) { in VisitRem() argument
156 if (DataType::IsFloatingPointType(instruction->GetResultType())) { in VisitRem()
161 if (instruction->GetRight()->IsConstant()) { in VisitRem()
162 int64_t imm = Int64FromConstant(instruction->GetRight()->AsConstant()); in VisitRem()
188 void SchedulingLatencyVisitorARM64::VisitSuspendCheck(HSuspendCheck* instruction) { in VisitSuspendCheck() argument
189 HBasicBlock* block = instruction->GetBlock(); in VisitSuspendCheck()
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Dscheduler_arm.h103 void Visit##type(H##type* instruction) override;
127 void HandleFieldSetLatencies(HInstruction* instruction, const FieldInfo& field_info);
128 void HandleFieldGetLatencies(HInstruction* instruction, const FieldInfo& field_info);
130 void HandleGenerateDataProc(HDataProcWithShifterOp* instruction);
131 void HandleGenerateLongDataProc(HDataProcWithShifterOp* instruction);
145 bool IsSchedulable(const HInstruction* instruction) const override { in IsSchedulable() argument
148 switch (instruction->GetKind()) { in IsSchedulable()
154 return HScheduler::IsSchedulable(instruction); in IsSchedulable()
Dcode_generator_arm64.h125 explicit SlowPathCodeARM64(HInstruction* instruction) in SlowPathCodeARM64() argument
126 : SlowPathCode(instruction), entry_label_(), exit_label_() {} in SlowPathCodeARM64()
299 void VisitInstruction(HInstruction* instruction) override { in FOR_EACH_CONCRETE_INSTRUCTION_ARM64()
300 LOG(FATAL) << "Unreachable instruction " << instruction->DebugName() in FOR_EACH_CONCRETE_INSTRUCTION_ARM64()
301 << " (id " << instruction->GetId() << ")"; in FOR_EACH_CONCRETE_INSTRUCTION_ARM64()
320 void GenerateSuspendCheck(HSuspendCheck* instruction, HBasicBlock* successor);
323 void HandleFieldSet(HInstruction* instruction,
326 void HandleFieldGet(HInstruction* instruction, const FieldInfo& field_info);
327 void HandleCondition(HCondition* instruction);
338 void GenerateReferenceLoadOneRegister(HInstruction* instruction,
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Dloop_optimization.h181 bool VectorizeDef(LoopNode* node, HInstruction* instruction, bool generate_code);
183 HInstruction* instruction,
207 HInstruction* ReduceAndExtractIfNeeded(HInstruction* instruction);
215 HInstruction* instruction,
220 HInstruction* instruction,
225 HInstruction* instruction,
230 HInstruction* instruction,
258 HInstruction* instruction,
262 HInstruction* instruction);
264 HInstruction* instruction,
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Dssa_liveness_analysis.h229 explicit SafepointPosition(HInstruction* instruction) in SafepointPosition() argument
230 : instruction_(instruction), in SafepointPosition()
233 static size_t ComputePosition(HInstruction* instruction) { in ComputePosition() argument
236 if (instruction->IsEmittedAtUseSite()) { in ComputePosition()
239 DCHECK(instruction->IsNullCheck()) << instruction->DebugName(); in ComputePosition()
240 return instruction->GetLifetimePosition() + 2; in ComputePosition()
242 return instruction->GetLifetimePosition(); in ComputePosition()
281 HInstruction* instruction = nullptr) {
282 return new (allocator) LiveInterval(allocator, type, instruction);
300 void AddTempUse(HInstruction* instruction, size_t temp_index) { in AddTempUse() argument
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Dcha_guard_optimization.cc149 HInstruction* instruction; in OptimizeWithDominatingGuard() local
153 instruction = flag->GetPrevious(); in OptimizeWithDominatingGuard()
156 instruction = dominator->GetLastInstruction(); in OptimizeWithDominatingGuard()
158 while (instruction != receiver) { in OptimizeWithDominatingGuard()
159 if (instruction == nullptr) { in OptimizeWithDominatingGuard()
165 if (instruction->IsShouldDeoptimizeFlag()) { in OptimizeWithDominatingGuard()
169 instruction = instruction->GetPrevious(); in OptimizeWithDominatingGuard()
Dgvn.cc84 void Add(HInstruction* instruction) { in Add() argument
85 DCHECK(Lookup(instruction) == nullptr); in Add()
86 size_t hash_code = HashCode(instruction); in Add()
92 buckets_[index] = new (allocator_) Node(instruction, hash_code, buckets_[index]); in Add()
98 HInstruction* Lookup(HInstruction* instruction) const { in Lookup()
99 size_t hash_code = HashCode(instruction); in Lookup()
105 if (existing->Equals(instruction)) { in Lookup()
114 bool Contains(HInstruction* instruction) const { in Contains()
115 size_t hash_code = HashCode(instruction); in Contains()
119 if (node->GetInstruction() == instruction) { in Contains()
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Dselect_generator.cc43 HInstruction* instruction = it.Current(); in IsSimpleBlock() local
44 if (instruction->IsControlFlow()) { in IsSimpleBlock()
45 return instruction->IsGoto() || instruction->IsReturn(); in IsSimpleBlock()
46 } else if (instruction->CanBeMoved() && in IsSimpleBlock()
47 !instruction->HasSideEffects() && in IsSimpleBlock()
48 !instruction->CanThrow()) { in IsSimpleBlock()
49 if (instruction->IsSelect() && in IsSimpleBlock()
50 instruction->AsSelect()->GetCondition()->GetBlock() == block) { in IsSimpleBlock()
Dprepare_for_register_allocation.cc104 void PrepareForRegisterAllocation::VisitArraySet(HArraySet* instruction) { in VisitArraySet() argument
105 HInstruction* value = instruction->GetValue(); in VisitArraySet()
111 if (instruction->NeedsTypeCheck()) { in VisitArraySet()
112 instruction->ClearNeedsTypeCheck(); in VisitArraySet()
307 void PrepareForRegisterAllocation::VisitTypeConversion(HTypeConversion* instruction) { in VisitTypeConversion() argument
310 if (instruction->IsImplicitConversion()) { in VisitTypeConversion()
311 instruction->ReplaceWith(instruction->GetInput()); in VisitTypeConversion()
312 instruction->GetBlock()->RemoveInstruction(instruction); in VisitTypeConversion()
Dinduction_var_analysis.h121 bool IsVisitedNode(HInstruction* instruction) const { in IsVisitedNode() argument
122 return map_.find(instruction) != map_.end(); in IsVisitedNode()
156 void VisitNode(HLoopInformation* loop, HInstruction* instruction);
157 uint32_t VisitDescendant(HLoopInformation* loop, HInstruction* instruction);
158 void ClassifyTrivial(HLoopInformation* loop, HInstruction* instruction);
179 HInstruction* instruction,
186 HInstruction* instruction,
192 HInstruction* instruction,
237 void AssignInfo(HLoopInformation* loop, HInstruction* instruction, InductionInfo* info);
238 InductionInfo* LookupInfo(HLoopInformation* loop, HInstruction* instruction);
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Dcode_generator_arm_vixl.h248 explicit SlowPathCodeARMVIXL(HInstruction* instruction) in SlowPathCodeARMVIXL() argument
249 : SlowPathCode(instruction), entry_label_(), exit_label_() {} in SlowPathCodeARMVIXL()
299 void VisitInstruction(HInstruction* instruction) override { in FOR_EACH_CONCRETE_INSTRUCTION_ARM()
300 LOG(FATAL) << "Unreachable instruction " << instruction->DebugName() in FOR_EACH_CONCRETE_INSTRUCTION_ARM()
301 << " (id " << instruction->GetId() << ")"; in FOR_EACH_CONCRETE_INSTRUCTION_ARM()
311 void HandleFieldSet(HInstruction* instruction, const FieldInfo& field_info);
312 void HandleFieldGet(HInstruction* instruction, const FieldInfo& field_info);
337 void VisitInstruction(HInstruction* instruction) override { in FOR_EACH_CONCRETE_INSTRUCTION_ARM()
338 LOG(FATAL) << "Unreachable instruction " << instruction->DebugName() in FOR_EACH_CONCRETE_INSTRUCTION_ARM()
339 << " (id " << instruction->GetId() << ")"; in FOR_EACH_CONCRETE_INSTRUCTION_ARM()
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Dscheduler.h309 size_t ArrayAccessHeapLocation(HInstruction* instruction) const;
310 size_t FieldAccessHeapLocation(const HInstruction* instruction) const;
409 void VisitInstruction(HInstruction* instruction) override { in VisitInstruction() argument
410 LOG(FATAL) << "Error visiting " << instruction->DebugName() << ". " in VisitInstruction()
416 void Visit(HInstruction* instruction) { in Visit() argument
417 instruction->Accept(this); in Visit()
511 virtual bool IsSchedulingBarrier(const HInstruction* instruction) const;
517 void Schedule(HInstruction* instruction);
528 virtual bool IsSchedulable(const HInstruction* instruction) const;
Dregister_allocator_linear_scan.cc116 HInstruction* instruction = inst_it.Current(); in AllocateRegisters() local
117 DCHECK_LE(current_liveness, instruction->GetLifetimePosition()); in AllocateRegisters()
118 current_liveness = instruction->GetLifetimePosition(); in AllocateRegisters()
123 HInstruction* instruction = inst_it.Current(); in AllocateRegisters() local
124 DCHECK_LE(current_liveness, instruction->GetLifetimePosition()) << instruction->DebugName(); in AllocateRegisters()
125 current_liveness = instruction->GetLifetimePosition(); in AllocateRegisters()
224 void RegisterAllocatorLinearScan::ProcessInstruction(HInstruction* instruction) { in ProcessInstruction() argument
225 LocationSummary* locations = instruction->GetLocations(); in ProcessInstruction()
226 size_t position = instruction->GetLifetimePosition(); in ProcessInstruction()
244 interval->AddTempUse(instruction, i); in ProcessInstruction()
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Dscheduler_arm64.h121 void Visit##type(H##type* instruction) override;
132 void HandleVecAddress(HVecMemoryOperation* instruction, size_t size);
141 bool IsSchedulable(const HInstruction* instruction) const override { in IsSchedulable() argument
144 switch (instruction->GetKind()) { in IsSchedulable()
152 return HScheduler::IsSchedulable(instruction); in IsSchedulable()
Dregister_allocator_graph_color.cc738 HInstruction* instruction = liveness_.GetInstructionFromSsaIndex(i); in Validate() local
739 LiveInterval* interval = instruction->GetLiveInterval(); in Validate()
741 intervals.push_back(instruction->GetLiveInterval()); in Validate()
808 void RegisterAllocatorGraphColor::ProcessInstruction(HInstruction* instruction) { in ProcessInstruction() argument
809 LocationSummary* locations = instruction->GetLocations(); in ProcessInstruction()
816 DCHECK(instruction->IsSuspendCheckEntry()); in ProcessInstruction()
818 instruction->GetBlock()->RemoveInstruction(instruction); in ProcessInstruction()
822 CheckForTempLiveIntervals(instruction); in ProcessInstruction()
823 CheckForSafepoint(instruction); in ProcessInstruction()
824 if (instruction->GetLocations()->WillCall()) { in ProcessInstruction()
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Dssa_builder.h68 HInstruction* GetFloatOrDoubleEquivalent(HInstruction* instruction, DataType::Type type);
69 HInstruction* GetReferenceTypeEquivalent(HInstruction* instruction);
124 bool HasAliasInEnvironments(HInstruction* instruction);
/art/libdexfile/dex/
Ddex_instruction_test.cc73 uint16_t instruction[4]; in TEST() local
78 instruction); in TEST()
80 DexInstructionIterator ins(instruction, /*dex_pc=*/ 0u); in TEST()
86 ASSERT_EQ(4u, ins->VRegA_45cc(instruction[0])); in TEST()
111 uint16_t instruction[4]; in TEST() local
116 instruction); in TEST()
118 DexInstructionIterator ins(instruction, /*dex_pc=*/ 0u); in TEST()
124 ASSERT_EQ(4u, ins->VRegA_4rcc(instruction[0])); in TEST()
/art/compiler/dex/
Dinline_method_analyser.cc308 const Instruction& instruction = pair.Inst(); in DoAnalyseConstructor() local
309 if (instruction.Opcode() == Instruction::RETURN_VOID) { in DoAnalyseConstructor()
311 } else if (instruction.Opcode() == Instruction::INVOKE_DIRECT) { in DoAnalyseConstructor()
312 ArtMethod* target_method = GetTargetConstructor(method, &instruction); in DoAnalyseConstructor()
319 instruction.VRegA_35c() <= code_item->InsSize()) { in DoAnalyseConstructor()
322 … size_t forwarded = CountForwardedConstructorArguments(code_item, &instruction, zero_vreg_mask); in DoAnalyseConstructor()
351 } else if (IsInstructionDirectConst(instruction.Opcode())) { in DoAnalyseConstructor()
352 zero_vreg_mask |= GetZeroVRegMask(&instruction); in DoAnalyseConstructor()
357 DCHECK(IsInstructionIPut(instruction.Opcode())); in DoAnalyseConstructor()
358 DCHECK_EQ(instruction.VRegB_22c(), this_vreg); in DoAnalyseConstructor()
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/art/runtime/interpreter/mterp/arm/
Dother.S18 GOTO_OPCODE ip @ jump to next instruction
35 GOTO_OPCODE ip @ jump to next instruction
44 GOTO_OPCODE ip @ jump to next instruction
53 GOTO_OPCODE ip @ execute next instruction
66 GOTO_OPCODE ip @ jump to next instruction
92 GOTO_OPCODE ip @ jump to next instruction
108 GOTO_OPCODE ip @ jump to next instruction
120 GOTO_OPCODE ip @ jump to next instruction
134 GOTO_OPCODE ip @ jump to next instruction
147 GOTO_OPCODE ip @ jump to next instruction
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Darray.S29 GOTO_OPCODE ip @ jump to next instruction
61 GOTO_OPCODE ip @ jump to next instruction
91 GOTO_OPCODE ip @ jump to next instruction
121 GOTO_OPCODE ip @ jump to next instruction
146 GOTO_OPCODE ip @ jump to next instruction
175 GOTO_OPCODE ip @ jump to next instruction
190 GOTO_OPCODE ip @ jump to next instruction
206 GOTO_OPCODE ip @ jump to next instruction
226 GOTO_OPCODE ip @ jump to next instruction
250 GOTO_OPCODE ip @ jump to next instruction
Dobject.S16 GOTO_OPCODE ip @ jump to next instruction
35 GOTO_OPCODE ip @ jump to next instruction
124 GOTO_OPCODE ip @ jump to next instruction
164 GOTO_OPCODE ip @ jump to next instruction
189 GOTO_OPCODE ip @ jump to next instruction
225 GOTO_OPCODE ip @ jump to next instruction
240 GOTO_OPCODE ip @ jump to next instruction
264 GOTO_OPCODE ip @ jump to next instruction
280 GOTO_OPCODE ip @ jump to next instruction
/art/test/521-regression-integer-field-set/
Dinfo.txt3 a `movw` instruction instead of a `movl` instruction.
/art/tools/veridex/
Dflow_analysis.h116 virtual RegisterValue AnalyzeInvoke(const Instruction& instruction, bool is_range) = 0;
117 virtual void AnalyzeFieldSet(const Instruction& instruction) = 0;
147 int GetBranchFlags(const Instruction& instruction) const;
196 RegisterValue AnalyzeInvoke(const Instruction& instruction, bool is_range) override;
197 void AnalyzeFieldSet(const Instruction& instruction) override;
216 RegisterValue AnalyzeInvoke(const Instruction& instruction, bool is_range) override;
217 void AnalyzeFieldSet(const Instruction& instruction) override;
/art/runtime/entrypoints/jni/
Djni_entrypoints.cc40 const Instruction& instruction = caller->DexInstructions().InstructionAt(dex_pc); in GetInvokeStaticMethodIndex() local
41 DCHECK(instruction.Opcode() == Instruction::INVOKE_STATIC || in GetInvokeStaticMethodIndex()
42 instruction.Opcode() == Instruction::INVOKE_STATIC_RANGE); in GetInvokeStaticMethodIndex()
43 uint32_t method_idx = (instruction.Opcode() == Instruction::INVOKE_STATIC) in GetInvokeStaticMethodIndex()
44 ? instruction.VRegB_35c() in GetInvokeStaticMethodIndex()
45 : instruction.VRegB_3rc(); in GetInvokeStaticMethodIndex()
/art/test/802-deoptimization/smali/
Dcatch_handler_on_entry.smali6 # move-exception instruction). This method must be called with parameter
11 # instruction (Label2) which throws an ArithmeticException (division by zero).
13 # Now p0 == 1. When we we execute the div-int instruction, it succeeds and we

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