1 /*
2 * Copyright (C) 2016 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 #ifndef ART_COMPILER_DEBUG_ELF_DEBUG_LOC_WRITER_H_
18 #define ART_COMPILER_DEBUG_ELF_DEBUG_LOC_WRITER_H_
19
20 #include <cstring>
21 #include <map>
22
23 #include "arch/instruction_set.h"
24 #include "compiled_method.h"
25 #include "debug/method_debug_info.h"
26 #include "dwarf/debug_info_entry_writer.h"
27 #include "dwarf/register.h"
28 #include "stack_map.h"
29
30 namespace art {
31 namespace debug {
32 using Reg = dwarf::Reg;
33
GetDwarfCoreReg(InstructionSet isa,int machine_reg)34 static Reg GetDwarfCoreReg(InstructionSet isa, int machine_reg) {
35 switch (isa) {
36 case InstructionSet::kArm:
37 case InstructionSet::kThumb2:
38 return Reg::ArmCore(machine_reg);
39 case InstructionSet::kArm64:
40 return Reg::Arm64Core(machine_reg);
41 case InstructionSet::kX86:
42 return Reg::X86Core(machine_reg);
43 case InstructionSet::kX86_64:
44 return Reg::X86_64Core(machine_reg);
45 case InstructionSet::kNone:
46 LOG(FATAL) << "No instruction set";
47 }
48 UNREACHABLE();
49 }
50
GetDwarfFpReg(InstructionSet isa,int machine_reg)51 static Reg GetDwarfFpReg(InstructionSet isa, int machine_reg) {
52 switch (isa) {
53 case InstructionSet::kArm:
54 case InstructionSet::kThumb2:
55 return Reg::ArmFp(machine_reg);
56 case InstructionSet::kArm64:
57 return Reg::Arm64Fp(machine_reg);
58 case InstructionSet::kX86:
59 return Reg::X86Fp(machine_reg);
60 case InstructionSet::kX86_64:
61 return Reg::X86_64Fp(machine_reg);
62 case InstructionSet::kNone:
63 LOG(FATAL) << "No instruction set";
64 }
65 UNREACHABLE();
66 }
67
68 struct VariableLocation {
69 uint32_t low_pc; // Relative to compilation unit.
70 uint32_t high_pc; // Relative to compilation unit.
71 DexRegisterLocation reg_lo; // May be None if the location is unknown.
72 DexRegisterLocation reg_hi; // Most significant bits of 64-bit value.
73 };
74
75 // Get the location of given dex register (e.g. stack or machine register).
76 // Note that the location might be different based on the current pc.
77 // The result will cover all ranges where the variable is in scope.
78 // PCs corresponding to stackmap with dex register map are accurate,
79 // all other PCs are best-effort only.
GetVariableLocations(const MethodDebugInfo * method_info,const std::vector<DexRegisterMap> & dex_register_maps,uint16_t vreg,bool is64bitValue,uint64_t compilation_unit_code_address,uint32_t dex_pc_low,uint32_t dex_pc_high,InstructionSet isa)80 static std::vector<VariableLocation> GetVariableLocations(
81 const MethodDebugInfo* method_info,
82 const std::vector<DexRegisterMap>& dex_register_maps,
83 uint16_t vreg,
84 bool is64bitValue,
85 uint64_t compilation_unit_code_address,
86 uint32_t dex_pc_low,
87 uint32_t dex_pc_high,
88 InstructionSet isa) {
89 std::vector<VariableLocation> variable_locations;
90
91 // Get stack maps sorted by pc (they might not be sorted internally).
92 // TODO(dsrbecky) Remove this once stackmaps get sorted by pc.
93 const CodeInfo code_info(method_info->code_info);
94 std::map<uint32_t, uint32_t> stack_maps; // low_pc -> stack_map_index.
95 for (uint32_t s = 0; s < code_info.GetNumberOfStackMaps(); s++) {
96 StackMap stack_map = code_info.GetStackMapAt(s);
97 DCHECK(stack_map.IsValid());
98 if (!stack_map.HasDexRegisterMap()) {
99 // The compiler creates stackmaps without register maps at the start of
100 // basic blocks in order to keep instruction-accurate line number mapping.
101 // However, we never stop at those (breakpoint locations always have map).
102 // Therefore, for the purpose of local variables, we ignore them.
103 // The main reason for this is to save space by avoiding undefined gaps.
104 continue;
105 }
106 const uint32_t pc_offset = stack_map.GetNativePcOffset(isa);
107 DCHECK_LE(pc_offset, method_info->code_size);
108 DCHECK_LE(compilation_unit_code_address, method_info->code_address);
109 const uint32_t low_pc = dchecked_integral_cast<uint32_t>(
110 method_info->code_address + pc_offset - compilation_unit_code_address);
111 stack_maps.emplace(low_pc, s);
112 }
113
114 // Create entries for the requested register based on stack map data.
115 for (auto it = stack_maps.begin(); it != stack_maps.end(); it++) {
116 const uint32_t low_pc = it->first;
117 const uint32_t stack_map_index = it->second;
118 const StackMap stack_map = code_info.GetStackMapAt(stack_map_index);
119 auto next_it = it;
120 next_it++;
121 const uint32_t high_pc = next_it != stack_maps.end()
122 ? next_it->first
123 : method_info->code_address + method_info->code_size - compilation_unit_code_address;
124 DCHECK_LE(low_pc, high_pc);
125 if (low_pc == high_pc) {
126 continue; // Ignore if the address range is empty.
127 }
128
129 // Check that the stack map is in the requested range.
130 uint32_t dex_pc = stack_map.GetDexPc();
131 if (!(dex_pc_low <= dex_pc && dex_pc < dex_pc_high)) {
132 // The variable is not in scope at this PC. Therefore omit the entry.
133 // Note that this is different to None() entry which means in scope, but unknown location.
134 continue;
135 }
136
137 // Find the location of the dex register.
138 DexRegisterLocation reg_lo = DexRegisterLocation::None();
139 DexRegisterLocation reg_hi = DexRegisterLocation::None();
140 DCHECK_LT(stack_map_index, dex_register_maps.size());
141 DexRegisterMap dex_register_map = dex_register_maps[stack_map_index];
142 DCHECK(!dex_register_map.empty());
143 CodeItemDataAccessor accessor(*method_info->dex_file, method_info->code_item);
144 reg_lo = dex_register_map[vreg];
145 if (is64bitValue) {
146 reg_hi = dex_register_map[vreg + 1];
147 }
148
149 // Add location entry for this address range.
150 if (!variable_locations.empty() &&
151 variable_locations.back().reg_lo == reg_lo &&
152 variable_locations.back().reg_hi == reg_hi &&
153 variable_locations.back().high_pc == low_pc) {
154 // Merge with the previous entry (extend its range).
155 variable_locations.back().high_pc = high_pc;
156 } else {
157 variable_locations.push_back({low_pc, high_pc, reg_lo, reg_hi});
158 }
159 }
160
161 return variable_locations;
162 }
163
164 // Write table into .debug_loc which describes location of dex register.
165 // The dex register might be valid only at some points and it might
166 // move between machine registers and stack.
WriteDebugLocEntry(const MethodDebugInfo * method_info,const std::vector<DexRegisterMap> & dex_register_maps,uint16_t vreg,bool is64bitValue,uint64_t compilation_unit_code_address,uint32_t dex_pc_low,uint32_t dex_pc_high,InstructionSet isa,dwarf::DebugInfoEntryWriter<> * debug_info,std::vector<uint8_t> * debug_loc_buffer,std::vector<uint8_t> * debug_ranges_buffer)167 static void WriteDebugLocEntry(const MethodDebugInfo* method_info,
168 const std::vector<DexRegisterMap>& dex_register_maps,
169 uint16_t vreg,
170 bool is64bitValue,
171 uint64_t compilation_unit_code_address,
172 uint32_t dex_pc_low,
173 uint32_t dex_pc_high,
174 InstructionSet isa,
175 dwarf::DebugInfoEntryWriter<>* debug_info,
176 std::vector<uint8_t>* debug_loc_buffer,
177 std::vector<uint8_t>* debug_ranges_buffer) {
178 using Kind = DexRegisterLocation::Kind;
179 if (method_info->code_info == nullptr || dex_register_maps.empty()) {
180 return;
181 }
182
183 std::vector<VariableLocation> variable_locations = GetVariableLocations(
184 method_info,
185 dex_register_maps,
186 vreg,
187 is64bitValue,
188 compilation_unit_code_address,
189 dex_pc_low,
190 dex_pc_high,
191 isa);
192
193 // Write .debug_loc entries.
194 dwarf::Writer<> debug_loc(debug_loc_buffer);
195 const size_t debug_loc_offset = debug_loc.size();
196 const bool is64bit = Is64BitInstructionSet(isa);
197 std::vector<uint8_t> expr_buffer;
198 for (const VariableLocation& variable_location : variable_locations) {
199 // Translate dex register location to DWARF expression.
200 // Note that 64-bit value might be split to two distinct locations.
201 // (for example, two 32-bit machine registers, or even stack and register)
202 dwarf::Expression expr(&expr_buffer);
203 DexRegisterLocation reg_lo = variable_location.reg_lo;
204 DexRegisterLocation reg_hi = variable_location.reg_hi;
205 for (int piece = 0; piece < (is64bitValue ? 2 : 1); piece++) {
206 DexRegisterLocation reg_loc = (piece == 0 ? reg_lo : reg_hi);
207 const Kind kind = reg_loc.GetKind();
208 const int32_t value = reg_loc.GetValue();
209 if (kind == Kind::kInStack) {
210 // The stack offset is relative to SP. Make it relative to CFA.
211 expr.WriteOpFbreg(value - method_info->frame_size_in_bytes);
212 if (piece == 0 && reg_hi.GetKind() == Kind::kInStack &&
213 reg_hi.GetValue() == value + 4) {
214 break; // the high word is correctly implied by the low word.
215 }
216 } else if (kind == Kind::kInRegister) {
217 expr.WriteOpReg(GetDwarfCoreReg(isa, value).num());
218 if (piece == 0 && reg_hi.GetKind() == Kind::kInRegisterHigh &&
219 reg_hi.GetValue() == value) {
220 break; // the high word is correctly implied by the low word.
221 }
222 } else if (kind == Kind::kInFpuRegister) {
223 if ((isa == InstructionSet::kArm || isa == InstructionSet::kThumb2) &&
224 piece == 0 && reg_hi.GetKind() == Kind::kInFpuRegister &&
225 reg_hi.GetValue() == value + 1 && value % 2 == 0) {
226 // Translate S register pair to D register (e.g. S4+S5 to D2).
227 expr.WriteOpReg(Reg::ArmDp(value / 2).num());
228 break;
229 }
230 expr.WriteOpReg(GetDwarfFpReg(isa, value).num());
231 if (piece == 0 && reg_hi.GetKind() == Kind::kInFpuRegisterHigh &&
232 reg_hi.GetValue() == reg_lo.GetValue()) {
233 break; // the high word is correctly implied by the low word.
234 }
235 } else if (kind == Kind::kConstant) {
236 expr.WriteOpConsts(value);
237 expr.WriteOpStackValue();
238 } else if (kind == Kind::kNone) {
239 break;
240 } else {
241 // kInStackLargeOffset and kConstantLargeValue are hidden by GetKind().
242 // kInRegisterHigh and kInFpuRegisterHigh should be handled by
243 // the special cases above and they should not occur alone.
244 LOG(WARNING) << "Unexpected register location: " << kind
245 << " (This can indicate either a bug in the dexer when generating"
246 << " local variable information, or a bug in ART compiler."
247 << " Please file a bug at go/art-bug)";
248 break;
249 }
250 if (is64bitValue) {
251 // Write the marker which is needed by split 64-bit values.
252 // This code is skipped by the special cases.
253 expr.WriteOpPiece(4);
254 }
255 }
256
257 if (expr.size() > 0) {
258 if (is64bit) {
259 debug_loc.PushUint64(variable_location.low_pc);
260 debug_loc.PushUint64(variable_location.high_pc);
261 } else {
262 debug_loc.PushUint32(variable_location.low_pc);
263 debug_loc.PushUint32(variable_location.high_pc);
264 }
265 // Write the expression.
266 debug_loc.PushUint16(expr.size());
267 debug_loc.PushData(expr.data());
268 } else {
269 // Do not generate .debug_loc if the location is not known.
270 }
271 }
272 // Write end-of-list entry.
273 if (is64bit) {
274 debug_loc.PushUint64(0);
275 debug_loc.PushUint64(0);
276 } else {
277 debug_loc.PushUint32(0);
278 debug_loc.PushUint32(0);
279 }
280
281 // Write .debug_ranges entries.
282 // This includes ranges where the variable is in scope but the location is not known.
283 dwarf::Writer<> debug_ranges(debug_ranges_buffer);
284 size_t debug_ranges_offset = debug_ranges.size();
285 for (size_t i = 0; i < variable_locations.size(); i++) {
286 uint32_t low_pc = variable_locations[i].low_pc;
287 uint32_t high_pc = variable_locations[i].high_pc;
288 while (i + 1 < variable_locations.size() && variable_locations[i+1].low_pc == high_pc) {
289 // Merge address range with the next entry.
290 high_pc = variable_locations[++i].high_pc;
291 }
292 if (is64bit) {
293 debug_ranges.PushUint64(low_pc);
294 debug_ranges.PushUint64(high_pc);
295 } else {
296 debug_ranges.PushUint32(low_pc);
297 debug_ranges.PushUint32(high_pc);
298 }
299 }
300 // Write end-of-list entry.
301 if (is64bit) {
302 debug_ranges.PushUint64(0);
303 debug_ranges.PushUint64(0);
304 } else {
305 debug_ranges.PushUint32(0);
306 debug_ranges.PushUint32(0);
307 }
308
309 // Simple de-duplication - check whether this entry is same as the last one (or tail of it).
310 size_t debug_ranges_entry_size = debug_ranges.size() - debug_ranges_offset;
311 if (debug_ranges_offset >= debug_ranges_entry_size) {
312 size_t previous_offset = debug_ranges_offset - debug_ranges_entry_size;
313 if (memcmp(debug_ranges_buffer->data() + previous_offset,
314 debug_ranges_buffer->data() + debug_ranges_offset,
315 debug_ranges_entry_size) == 0) {
316 // Remove what we have just written and use the last entry instead.
317 debug_ranges_buffer->resize(debug_ranges_offset);
318 debug_ranges_offset = previous_offset;
319 }
320 }
321
322 // Write attributes to .debug_info.
323 debug_info->WriteSecOffset(dwarf::DW_AT_location, debug_loc_offset);
324 debug_info->WriteSecOffset(dwarf::DW_AT_start_scope, debug_ranges_offset);
325 }
326
327 } // namespace debug
328 } // namespace art
329
330 #endif // ART_COMPILER_DEBUG_ELF_DEBUG_LOC_WRITER_H_
331
332