Searched refs:R7 (Results 1 – 5 of 5) sorted by relevance
34 R7 = 7, enumerator
34 (1 << art::arm::R5) | (1 << art::arm::R6) | (1 << art::arm::R7) | (1 << art::arm::R8) |
284 EXPECT_EQ(R7, reg.AsRegisterPairHigh()); in TEST()462 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromCoreRegister(R7))); in TEST()484 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromCoreRegister(R7))); in TEST()503 reg = ArmManagedRegister::FromCoreRegister(R7); in TEST()506 EXPECT_TRUE(reg.Overlaps(ArmManagedRegister::FromCoreRegister(R7))); in TEST()528 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromCoreRegister(R7))); in TEST()550 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromCoreRegister(R7))); in TEST()572 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromCoreRegister(R7))); in TEST()594 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromCoreRegister(R7))); in TEST()616 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromCoreRegister(R7))); in TEST()[all …]
91 AddAllocatedRegister(Location::RegisterLocation(arm::R7)); in TestCodeGeneratorARMVIXL()98 blocked_core_registers_[arm::R7] = false; in SetupBlockedRegisters()
75 ArmManagedRegister::FromCoreRegister(R7),131 ArmManagedRegister::FromCoreRegister(R7),