Searched refs:XMM1 (Results 1 – 13 of 13) sorted by relevance
| /art/runtime/arch/x86/ |
| D | registers_x86.h | 44 XMM1 = 1, enumerator
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| D | callee_save_frame_x86.h | 41 (1 << art::x86::XMM0) | (1 << art::x86::XMM1) |
44 (1 << art::x86::XMM0) | (1 << art::x86::XMM1) |
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| /art/runtime/arch/x86_64/ |
| D | registers_x86_64.h | 52 XMM1 = 1, enumerator
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| D | callee_save_frame_x86_64.h | 45 (1 << art::x86_64::XMM0) | (1 << art::x86_64::XMM1) | (1 << art::x86_64::XMM2) |
52 (1 << art::x86_64::XMM0) | (1 << art::x86_64::XMM1) |
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| D | context_x86_64.cc | 76 fprs_[XMM1] = nullptr; in SmashCallerSaves()
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| /art/compiler/optimizing/ |
| D | code_generator_x86.h | 40 static constexpr XmmRegister kParameterFpuRegisters[] = { XMM0, XMM1, XMM2, XMM3 };
46 static constexpr XmmRegister kRuntimeParameterFpuRegisters[] = { XMM0, XMM1, XMM2, XMM3 };
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| D | code_generator_x86_64.h | 38 { XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7 };
46 static constexpr FloatRegister kRuntimeParameterFpuRegisters[] = { XMM0, XMM1 };
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| D | code_generator_x86.cc | 2289 __ movaps(XMM1, XMM0); in VisitReturn()
2290 __ psrlq(XMM1, Immediate(32)); in VisitReturn()
2291 __ movd(EDX, XMM1); in VisitReturn()
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| D | intrinsics_x86.cc | 488 __ movsd(Address(ESP, 8), XMM1); in GenFPToFPCall()
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| /art/compiler/utils/x86_64/ |
| D | managed_register_x86_64_test.cc | 73 reg = X86_64ManagedRegister::FromXmmRegister(XMM1); in TEST()
79 EXPECT_EQ(XMM1, reg.AsXmmRegister()); in TEST()
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| D | assembler_x86_64_test.cc | 271 fp_registers_.push_back(new x86_64::XmmRegister(x86_64::XMM1)); in SetUpHelpers()
2351 assembler->Store(FrameOffset(frame_size + 16u), ManagedFromFpu(x86_64::XMM1), /* size= */ 8u); in buildframe_test_fn()
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| /art/compiler/utils/x86/ |
| D | managed_register_x86_test.cc | 74 reg = X86ManagedRegister::FromXmmRegister(XMM1); in TEST()
80 EXPECT_EQ(XMM1, reg.AsXmmRegister()); in TEST()
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| D | assembler_x86_test.cc | 102 new x86::XmmRegister(x86::XMM1), in SetUpHelpers()
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