Home
last modified time | relevance | path

Searched refs:op2 (Results 1 – 5 of 5) sorted by relevance

/art/test/1978-regular-obsolete-then-structural-obsolescence/
Dexpected.txt5 Not doing anything here - op2
6 Running after op2 using normal definition
13 Running after op2 using structural redefinition
17 Running after op2 using structural redefinition
19 Not doing anything here - op2
20 Running after op2 using structural redefinition
/art/compiler/optimizing/
Dcodegen_test.cc627 HInstruction* op2; in TestComparison() local
630 op2 = graph->GetIntConstant(j); in TestComparison()
634 op2 = graph->GetLongConstant(j); in TestComparison()
643 comparison = new (GetAllocator()) HEqual(op1, op2); in TestComparison()
647 comparison = new (GetAllocator()) HNotEqual(op1, op2); in TestComparison()
651 comparison = new (GetAllocator()) HLessThan(op1, op2); in TestComparison()
655 comparison = new (GetAllocator()) HLessThanOrEqual(op1, op2); in TestComparison()
659 comparison = new (GetAllocator()) HGreaterThan(op1, op2); in TestComparison()
663 comparison = new (GetAllocator()) HGreaterThanOrEqual(op1, op2); in TestComparison()
667 comparison = new (GetAllocator()) HBelow(op1, op2); in TestComparison()
[all …]
Dcode_generator_x86_64.cc4210 CpuRegister op2 = op2_loc.AsRegister<CpuRegister>(); in GenerateMinMaxInt() local
4219 __ cmpq(out, op2); in GenerateMinMaxInt()
4220 __ cmov(is_min ? Condition::kGreater : Condition::kLess, out, op2, /*is64bit*/ true); in GenerateMinMaxInt()
4223 __ cmpl(out, op2); in GenerateMinMaxInt()
4224 __ cmov(is_min ? Condition::kGreater : Condition::kLess, out, op2, /*is64bit*/ false); in GenerateMinMaxInt()
4259 XmmRegister op2 = op2_loc.AsFpuRegister<XmmRegister>(); in GenerateMinMaxFP() local
4263 __ ucomisd(out, op2); in GenerateMinMaxFP()
4266 __ ucomiss(out, op2); in GenerateMinMaxFP()
4277 __ orpd(out, op2); in GenerateMinMaxFP()
4279 __ orps(out, op2); in GenerateMinMaxFP()
[all …]
Dcode_generator_x86.cc4100 Register op2 = op2_loc.AsRegister<Register>(); in GenerateMinMaxInt() local
4108 __ cmpl(out, op2); in GenerateMinMaxInt()
4110 __ cmovl(cond, out, op2); in GenerateMinMaxInt()
4145 XmmRegister op2 = op2_loc.AsFpuRegister<XmmRegister>(); in GenerateMinMaxFP() local
4149 __ ucomisd(out, op2); in GenerateMinMaxFP()
4152 __ ucomiss(out, op2); in GenerateMinMaxFP()
4163 __ orpd(out, op2); in GenerateMinMaxFP()
4165 __ orps(out, op2); in GenerateMinMaxFP()
4169 __ andpd(out, op2); in GenerateMinMaxFP()
4171 __ andps(out, op2); in GenerateMinMaxFP()
[all …]
Dcode_generator_arm_vixl.cc4694 vixl32::Register op2 = RegisterFrom(op2_loc); in GenerateMinMaxInt() local
4697 __ Cmp(op1, op2); in GenerateMinMaxInt()
4706 __ mov(is_min ? ge : le, out, op2); in GenerateMinMaxInt()
4762 vixl32::SRegister op2 = SRegisterFrom(op2_loc); in GenerateMinMaxFloat() local
4773 __ Vcmp(op1, op2); in GenerateMinMaxFloat()
4784 __ vmov(cond, F32, out, op2); in GenerateMinMaxFloat()
4791 __ Vmov(temp2, op2); in GenerateMinMaxFloat()
4823 vixl32::DRegister op2 = DRegisterFrom(op2_loc); in GenerateMinMaxDouble() local
4830 __ Vcmp(op1, op2); in GenerateMinMaxDouble()
4841 __ vmov(cond, F64, out, op2); in GenerateMinMaxDouble()
[all …]