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/hardware/qcom/neuralnetworks/hvxservice/1.0/hexagon_nn_controller/
Dhexagon_nn_controller.h62 unsigned int batches; member
92 unsigned int batches, unsigned int height,
/hardware/qcom/neuralnetworks/hvxservice/1.0/
DHexagonController.cpp134 int Controller::append_const_node(hexagon_nn_nn_id id, uint32_t node_id, uint32_t batches, in append_const_node() argument
137 CONTROLLER_CHECK(append_const_node, id, node_id, batches, height, width, depth, data, data_len); in append_const_node()
DHexagonController.h73 int append_const_node(hexagon_nn_nn_id id, uint32_t node_id, uint32_t batches, uint32_t height,
DHexagonUtils.cpp262 return "hexagon_nn_tensordef{.batches: " + std::to_string(tensordef.batches) + in toString()
DHexagonModel.cpp628 .batches = dimensions[0], in convertToTensordef()
/hardware/interfaces/media/omx/1.0/
DIOmxObserver.hal31 * come in batches.
DIOmxNode.hal340 * receive the message in batches by the callback
/hardware/interfaces/neuralnetworks/1.0/
Dtypes.hal147 * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
170 * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
189 * [batches, out_height, out_width, depth].
257 * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
285 * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
310 * [batches, out_height, out_width, depth_out].
319 * Given an input tensor of shape [batches, height, width, depth_in] and a
353 * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
382 * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
407 * [batches, out_height, out_width, depth_out]. For
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/hardware/interfaces/neuralnetworks/1.2/
Dtypes.hal232 * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
234 * Since HAL version 1.2, zero batches is supported for this tensor.
259 * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
261 * Since HAL version 1.2, zero batches is supported for this tensor.
282 * [batches, out_height, out_width, depth].
367 * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
369 * Since HAL version 1.2, zero batches is supported for this tensor.
416 * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
418 * Since HAL version 1.2, zero batches is supported for this tensor.
462 * [batches, out_height, out_width, depth_out].
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/hardware/interfaces/neuralnetworks/1.3/
Dtypes.hal176 * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
178 * Since HAL version 1.2, zero batches is supported for this tensor.
203 * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
205 * Since HAL version 1.2, zero batches is supported for this tensor.
226 * [batches, out_height, out_width, depth].
330 * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
332 * Since HAL version 1.2, zero batches is supported for this tensor.
380 * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
382 * Since HAL version 1.2, zero batches is supported for this tensor.
427 * [batches, out_height, out_width, depth_out].
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