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Searched refs:VReg (Results 1 – 8 of 8) sorted by relevance

/tools/dexter/slicer/
Dinstrumentation.cc90 move_result->operands.push_back(code_ir->Alloc<lir::VReg>(dst_reg)); in BoxValue()
186 move->operands.push_back(code_ir->Alloc<lir::VReg>(reg - shift)); in GenerateShiftParamsCode()
187 move->operands.push_back(code_ir->Alloc<lir::VReg>(reg)); in GenerateShiftParamsCode()
192 move->operands.push_back(code_ir->Alloc<lir::VReg>(reg - shift)); in GenerateShiftParamsCode()
193 move->operands.push_back(code_ir->Alloc<lir::VReg>(reg)); in GenerateShiftParamsCode()
246 const_size_op->operands.push_back(code_ir->Alloc<lir::VReg>(array_size_reg)); in InjectArrayParamsHook()
254 allocate_array_op->operands.push_back(code_ir->Alloc<lir::VReg>(array_reg)); in InjectArrayParamsHook()
255 allocate_array_op->operands.push_back(code_ir->Alloc<lir::VReg>(array_size_reg)); in InjectArrayParamsHook()
287 index_const_op->operands.push_back(code_ir->Alloc<lir::VReg>(array_index_reg)); in InjectArrayParamsHook()
293 aput_op->operands.push_back(code_ir->Alloc<lir::VReg>(src_reg)); in InjectArrayParamsHook()
[all …]
Dcode_ir.cc166 annotation->operands.push_back(Alloc<VReg>(dex::ReadULeb128(&ptr))); in DissasembleDebugInfo()
181 annotation->operands.push_back(Alloc<VReg>(dex::ReadULeb128(&ptr))); in DissasembleDebugInfo()
200 annotation->operands.push_back(Alloc<VReg>(dex::ReadULeb128(&ptr))); in DissasembleDebugInfo()
429 return Alloc<VReg>(dex_instr.vA); in GetRegA()
438 return Alloc<VReg>(dex_instr.vB); in GetRegB()
447 return Alloc<VReg>(dex_instr.vC); in GetRegC()
Ddebuginfo_encoder.cc72 auto reg = dbg_annotation->CastOperand<VReg>(0)->reg; in Visit()
82 auto reg = dbg_annotation->CastOperand<VReg>(0)->reg; in Visit()
95 auto reg = dbg_annotation->CastOperand<VReg>(0)->reg; in Visit()
Dbytecode_encoder.cc99 : bytecode->CastOperand<VReg>(index)->reg; in GetRegA()
108 : bytecode->CastOperand<VReg>(index)->reg; in GetRegB()
117 : bytecode->CastOperand<VReg>(index)->reg; in GetRegC()
/tools/dexter/slicer/export/slicer/
Dcode_ir.h60 struct VReg;
97 virtual bool Visit(VReg* vreg) { return false; } in Visit()
151 struct VReg : public Operand { struct
154 explicit VReg(dex::u4 reg) : reg(reg) {} in VReg() argument
/tools/dexter/dexter/
Dexperimental.cc244 reg = bytecode->CastOperand<lir::VReg>(0)->reg; in StressExitHook()
250 reg = bytecode->CastOperand<lir::VReg>(0)->reg; in StressExitHook()
423 load_block_id->operands.push_back(code_ir.Alloc<lir::VReg>(scratch_reg)); in CodeCoverage()
Ddissasembler.h41 virtual bool Visit(lir::VReg* vreg) override;
Ddissasembler.cc133 bool PrintCodeIrVisitor::Visit(lir::VReg* vreg) { in Visit()