Searched refs:depth_out (Results 1 – 6 of 6) sorted by relevance
| /hardware/qcom/neuralnetworks/hvxservice/1.0/ |
| D | HexagonController.cpp | 148 uint32_t* width_out, uint32_t* depth_out, uint8_t* data_out, in execute() argument
151 batches_out, height_out, width_out, depth_out, data_out, data_out_max, in execute()
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| D | HexagonController.h | 82 uint32_t* depth_out, uint8_t* data_out, uint32_t data_out_max,
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| /hardware/qcom/neuralnetworks/hvxservice/1.0/hexagon_nn_controller/ |
| D | hexagon_nn_controller.h | 108 unsigned int* depth_out, unsigned char* data_out,
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| /hardware/interfaces/neuralnetworks/1.0/ |
| D | types.hal | 260 * [depth_out, filter_height, filter_width, depth_in], specifying the
262 * * 2: A 1-D tensor, of shape [depth_out], specifying the bias. For input
288 * [depth_out, filter_height, filter_width, depth_in], specifying the
290 * * 2: A 1-D tensor, of shape [depth_out], specifying the bias. For input
310 * [batches, out_height, out_width, depth_out].
320 * filter tensor of shape [1, filter_height, filter_width, depth_out]
321 * containing depth_out convolutional filters of depth 1, DEPTHWISE_CONV
326 * The output has depth_out = depth_in * depth_multiplier channels.
355 * * 1: A 4-D tensor, of shape [1, filter_height, filter_width, depth_out],
357 * * 2: A 1-D tensor, of shape [depth_out], specifying the bias. For input
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| /hardware/interfaces/neuralnetworks/1.2/ |
| D | types.hal | 371 * [depth_out, filter_height, filter_width, depth_in], specifying the
376 * * 2: A 1-D tensor, of shape [depth_out], specifying the bias. For input
420 * [depth_out, filter_height, filter_width, depth_in], specifying the
425 * * 2: A 1-D tensor, of shape [depth_out], specifying the bias. For input
462 * [batches, out_height, out_width, depth_out].
472 * filter tensor of shape [1, filter_height, filter_width, depth_out]
473 * containing depth_out convolutional filters of depth 1, DEPTHWISE_CONV
478 * The output has depth_out = depth_in * depth_multiplier channels.
520 * * 1: A 4-D tensor, of shape [1, filter_height, filter_width, depth_out],
525 * * 2: A 1-D tensor, of shape [depth_out], specifying the bias. For input
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| /hardware/interfaces/neuralnetworks/1.3/ |
| D | types.hal | 334 * [depth_out, filter_height, filter_width, depth_in], specifying the
339 * * 2: A 1-D tensor, of shape [depth_out], specifying the bias. For input
384 * [depth_out, filter_height, filter_width, depth_in], specifying the
389 * * 2: A 1-D tensor, of shape [depth_out], specifying the bias. For input
427 * [batches, out_height, out_width, depth_out].
437 * filter tensor of shape [1, filter_height, filter_width, depth_out]
438 * containing depth_out convolutional filters of depth 1, DEPTHWISE_CONV
443 * The output has depth_out = depth_in * depth_multiplier channels.
497 * * 1: A 4-D tensor, of shape [1, filter_height, filter_width, depth_out],
502 * * 2: A 1-D tensor, of shape [depth_out], specifying the bias. For input
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