1 /*
2  * Copyright (C) 2014 The Android Open Source Project
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *      http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 
17 #ifndef ART_DISASSEMBLER_DISASSEMBLER_ARM64_H_
18 #define ART_DISASSEMBLER_DISASSEMBLER_ARM64_H_
19 
20 #include "disassembler.h"
21 
22 // TODO(VIXL): Make VIXL compile with -Wshadow.
23 #pragma GCC diagnostic push
24 #pragma GCC diagnostic ignored "-Wshadow"
25 #include "aarch64/decoder-aarch64.h"
26 #include "aarch64/disasm-aarch64.h"
27 #pragma GCC diagnostic pop
28 
29 namespace art {
30 namespace arm64 {
31 
32 class CustomDisassembler final : public vixl::aarch64::Disassembler {
33  public:
CustomDisassembler(DisassemblerOptions * options)34   explicit CustomDisassembler(DisassemblerOptions* options)
35       : vixl::aarch64::Disassembler(),
36         read_literals_(options->can_read_literals_),
37         base_address_(options->base_address_),
38         end_address_(options->end_address_),
39         options_(options) {
40     if (!options->absolute_addresses_) {
41       MapCodeAddress(0,
42                      reinterpret_cast<const vixl::aarch64::Instruction*>(options->base_address_));
43     }
44   }
45 
46   // Use register aliases in the disassembly.
47   void AppendRegisterNameToOutput(const vixl::aarch64::Instruction* instr,
48                                   const vixl::aarch64::CPURegister& reg) override;
49 
50   // Improve the disassembly of literal load instructions.
51   void VisitLoadLiteral(const vixl::aarch64::Instruction* instr) override;
52 
53   // Improve the disassembly of thread offset.
54   void VisitLoadStoreUnsignedOffset(const vixl::aarch64::Instruction* instr) override;
55 
56  private:
57   // Indicate if the disassembler should read data loaded from literal pools.
58   // This should only be enabled if reading the target of literal loads is safe.
59   // Here are possible outputs when the option is on or off:
60   // read_literals_ | disassembly
61   //           true | 0x72681558: 1c000acb  ldr s11, pc+344 (addr 0x726816b0)
62   //          false | 0x72681558: 1c000acb  ldr s11, pc+344 (addr 0x726816b0) (3.40282e+38)
63   const bool read_literals_;
64 
65   // Valid address range: [base_address_, end_address_)
66   const void* const base_address_;
67   const void* const end_address_;
68 
69   DisassemblerOptions* options_;
70 };
71 
72 class DisassemblerArm64 final : public Disassembler {
73  public:
DisassemblerArm64(DisassemblerOptions * options)74   explicit DisassemblerArm64(DisassemblerOptions* options) :
75       Disassembler(options), disasm(options) {
76     decoder.AppendVisitor(&disasm);
77   }
78 
79   size_t Dump(std::ostream& os, const uint8_t* begin) override;
80   void Dump(std::ostream& os, const uint8_t* begin, const uint8_t* end) override;
81 
82  private:
83   vixl::aarch64::Decoder decoder;
84   CustomDisassembler disasm;
85 
86   DISALLOW_COPY_AND_ASSIGN(DisassemblerArm64);
87 };
88 
89 }  // namespace arm64
90 }  // namespace art
91 
92 #endif  // ART_DISASSEMBLER_DISASSEMBLER_ARM64_H_
93