Lines Matching refs:imm
115 void X86Assembler::pushl(const Immediate& imm) { in pushl() argument
117 if (imm.is_int8()) { in pushl()
119 EmitUint8(imm.value() & 0xFF); in pushl()
122 EmitImmediate(imm); in pushl()
140 void X86Assembler::movl(Register dst, const Immediate& imm) { in movl() argument
143 EmitImmediate(imm); in movl()
168 void X86Assembler::movl(const Address& dst, const Immediate& imm) { in movl() argument
172 EmitImmediate(imm); in movl()
325 void X86Assembler::movb(const Address& dst, const Immediate& imm) { in movb() argument
329 CHECK(imm.is_int8()); in movb()
330 EmitUint8(imm.value() & 0xFF); in movb()
379 void X86Assembler::movw(const Address& dst, const Immediate& imm) { in movw() argument
384 CHECK(imm.is_uint16() || imm.is_int16()); in movw()
385 EmitUint8(imm.value() & 0xFF); in movw()
386 EmitUint8(imm.value() >> 8); in movw()
1793 void X86Assembler::roundsd(XmmRegister dst, XmmRegister src, const Immediate& imm) { in roundsd() argument
1800 EmitUint8(imm.value()); in roundsd()
1804 void X86Assembler::roundss(XmmRegister dst, XmmRegister src, const Immediate& imm) { in roundss() argument
1811 EmitUint8(imm.value()); in roundss()
2569 void X86Assembler::shufpd(XmmRegister dst, XmmRegister src, const Immediate& imm) { in shufpd() argument
2575 EmitUint8(imm.value()); in shufpd()
2579 void X86Assembler::shufps(XmmRegister dst, XmmRegister src, const Immediate& imm) { in shufps() argument
2584 EmitUint8(imm.value()); in shufps()
2588 void X86Assembler::pshufd(XmmRegister dst, XmmRegister src, const Immediate& imm) { in pshufd() argument
2594 EmitUint8(imm.value()); in pshufd()
2904 void X86Assembler::cmpb(const Address& address, const Immediate& imm) { in cmpb() argument
2908 EmitUint8(imm.value() & 0xFF); in cmpb()
2912 void X86Assembler::cmpw(const Address& address, const Immediate& imm) { in cmpw() argument
2915 EmitComplex(7, address, imm, /* is_16_op= */ true); in cmpw()
2919 void X86Assembler::cmpl(Register reg, const Immediate& imm) { in cmpl() argument
2921 EmitComplex(7, Operand(reg), imm); in cmpl()
2960 void X86Assembler::cmpl(const Address& address, const Immediate& imm) { in cmpl() argument
2962 EmitComplex(7, address, imm); in cmpl()
3005 void X86Assembler::testb(const Address& dst, const Immediate& imm) { in testb() argument
3009 CHECK(imm.is_int8()); in testb()
3010 EmitUint8(imm.value() & 0xFF); in testb()
3014 void X86Assembler::testl(const Address& dst, const Immediate& imm) { in testl() argument
3018 EmitImmediate(imm); in testl()
3036 void X86Assembler::andl(Register dst, const Immediate& imm) { in andl() argument
3038 EmitComplex(4, Operand(dst), imm); in andl()
3056 void X86Assembler::orl(Register dst, const Immediate& imm) { in orl() argument
3058 EmitComplex(1, Operand(dst), imm); in orl()
3076 void X86Assembler::xorl(Register dst, const Immediate& imm) { in xorl() argument
3078 EmitComplex(6, Operand(dst), imm); in xorl()
3082 void X86Assembler::addl(Register reg, const Immediate& imm) { in addl() argument
3084 EmitComplex(0, Operand(reg), imm); in addl()
3095 void X86Assembler::addl(const Address& address, const Immediate& imm) { in addl() argument
3097 EmitComplex(0, address, imm); in addl()
3101 void X86Assembler::addw(const Address& address, const Immediate& imm) { in addw() argument
3103 CHECK(imm.is_uint16() || imm.is_int16()) << imm.value(); in addw()
3105 EmitComplex(0, address, imm, /* is_16_op= */ true); in addw()
3109 void X86Assembler::adcl(Register reg, const Immediate& imm) { in adcl() argument
3111 EmitComplex(2, Operand(reg), imm); in adcl()
3136 void X86Assembler::subl(Register reg, const Immediate& imm) { in subl() argument
3138 EmitComplex(5, Operand(reg), imm); in subl()
3184 void X86Assembler::imull(Register dst, Register src, const Immediate& imm) { in imull() argument
3187 int32_t v32 = static_cast<int32_t>(imm.value()); in imull()
3197 EmitImmediate(imm); in imull()
3202 void X86Assembler::imull(Register reg, const Immediate& imm) { in imull() argument
3203 imull(reg, reg, imm); in imull()
3250 void X86Assembler::sbbl(Register reg, const Immediate& imm) { in sbbl() argument
3252 EmitComplex(3, Operand(reg), imm); in sbbl()
3296 void X86Assembler::shll(Register reg, const Immediate& imm) { in shll() argument
3297 EmitGenericShift(4, Operand(reg), imm); in shll()
3306 void X86Assembler::shll(const Address& address, const Immediate& imm) { in shll() argument
3307 EmitGenericShift(4, address, imm); in shll()
3316 void X86Assembler::shrl(Register reg, const Immediate& imm) { in shrl() argument
3317 EmitGenericShift(5, Operand(reg), imm); in shrl()
3326 void X86Assembler::shrl(const Address& address, const Immediate& imm) { in shrl() argument
3327 EmitGenericShift(5, address, imm); in shrl()
3336 void X86Assembler::sarl(Register reg, const Immediate& imm) { in sarl() argument
3337 EmitGenericShift(7, Operand(reg), imm); in sarl()
3346 void X86Assembler::sarl(const Address& address, const Immediate& imm) { in sarl() argument
3347 EmitGenericShift(7, address, imm); in sarl()
3365 void X86Assembler::shld(Register dst, Register src, const Immediate& imm) { in shld() argument
3370 EmitUint8(imm.value() & 0xFF); in shld()
3383 void X86Assembler::shrd(Register dst, Register src, const Immediate& imm) { in shrd() argument
3388 EmitUint8(imm.value() & 0xFF); in shrd()
3392 void X86Assembler::roll(Register reg, const Immediate& imm) { in roll() argument
3393 EmitGenericShift(0, Operand(reg), imm); in roll()
3402 void X86Assembler::rorl(Register reg, const Immediate& imm) { in rorl() argument
3403 EmitGenericShift(1, Operand(reg), imm); in rorl()
3426 void X86Assembler::enter(const Immediate& imm) { in enter() argument
3429 CHECK(imm.is_uint16()); in enter()
3430 EmitUint8(imm.value() & 0xFF); in enter()
3431 EmitUint8((imm.value() >> 8) & 0xFF); in enter()
3448 void X86Assembler::ret(const Immediate& imm) { in ret() argument
3451 CHECK(imm.is_uint16()); in ret()
3452 EmitUint8(imm.value() & 0xFF); in ret()
3453 EmitUint8((imm.value() >> 8) & 0xFF); in ret()
3676 void X86Assembler::AddImmediate(Register reg, const Immediate& imm) { in AddImmediate() argument
3677 int value = imm.value(); in AddImmediate()
3682 addl(reg, imm); in AddImmediate()
3767 void X86Assembler::EmitImmediate(const Immediate& imm, bool is_16_op) { in EmitImmediate() argument
3769 EmitUint8(imm.value() & 0xFF); in EmitImmediate()
3770 EmitUint8(imm.value() >> 8); in EmitImmediate()
3772 EmitInt32(imm.value()); in EmitImmediate()
3836 const Immediate& imm) { in EmitGenericShift() argument
3838 CHECK(imm.is_int8()); in EmitGenericShift()
3839 if (imm.value() == 1) { in EmitGenericShift()
3845 EmitUint8(imm.value() & 0xFF); in EmitGenericShift()