Lines Matching refs:__u32
82 __u32 fpga_id;
83 __u32 fpga_version;
84 __u32 cpu_start;
85 __u32 cpu_stop;
86 __u32 misc_reg;
87 __u32 idt_mode;
88 __u32 uart_irq_status;
89 __u32 clear_timer0_irq;
90 __u32 clear_timer1_irq;
91 __u32 clear_timer2_irq;
92 __u32 test_register;
93 __u32 test_count;
94 __u32 timer_select;
95 __u32 pr_uart_irq_status;
96 __u32 ram_wait_state;
97 __u32 uart_wait_state;
98 __u32 timer_wait_state;
99 __u32 ack_wait_state;
102 __u32 loc_addr_range;
103 __u32 loc_addr_base;
104 __u32 loc_arbitr;
105 __u32 endian_descr;
106 __u32 loc_rom_range;
107 __u32 loc_rom_base;
108 __u32 loc_bus_descr;
109 __u32 loc_range_mst;
110 __u32 loc_base_mst;
111 __u32 loc_range_io;
112 __u32 pci_base_mst;
113 __u32 pci_conf_io;
114 __u32 filler1;
115 __u32 filler2;
116 __u32 filler3;
117 __u32 filler4;
118 __u32 mail_box_0;
119 __u32 mail_box_1;
120 __u32 mail_box_2;
121 __u32 mail_box_3;
122 __u32 filler5;
123 __u32 filler6;
124 __u32 filler7;
125 __u32 filler8;
126 __u32 pci_doorbell;
127 __u32 loc_doorbell;
128 __u32 intr_ctrl_stat;
129 __u32 init_ctrl;
147 __u32 signature;
148 __u32 zfwctrl_addr;
246 __u32 op_mode;
247 __u32 intr_enable;
248 __u32 sw_flow;
249 __u32 flow_status;
250 __u32 comm_baud;
251 __u32 comm_parity;
252 __u32 comm_data_l;
253 __u32 comm_flags;
254 __u32 hw_flow;
255 __u32 rs_control;
256 __u32 rs_status;
257 __u32 flow_xon;
258 __u32 flow_xoff;
259 __u32 hw_overflow;
260 __u32 sw_overflow;
261 __u32 comm_error;
262 __u32 ichar;
263 __u32 filler[7];
266 __u32 flag_dma;
267 __u32 tx_bufaddr;
268 __u32 tx_bufsize;
269 __u32 tx_threshold;
270 __u32 tx_get;
271 __u32 tx_put;
272 __u32 rx_bufaddr;
273 __u32 rx_bufsize;
274 __u32 rx_threshold;
275 __u32 rx_get;
276 __u32 rx_put;
277 __u32 filler[5];
280 __u32 n_channel;
281 __u32 fw_version;
282 __u32 op_system;
283 __u32 dr_version;
284 __u32 inactivity;
285 __u32 hcmd_channel;
286 __u32 hcmd_param;
287 __u32 fwcmd_channel;
288 __u32 fwcmd_param;
289 __u32 zf_int_queue_addr;
290 __u32 filler[6];