1 /* 2 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are 6 * met: 7 * * Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * * Redistributions in binary form must reproduce the above 10 * copyright notice, this list of conditions and the following 11 * disclaimer in the documentation and/or other materials provided 12 * with the distribution. 13 * * Neither the name of The Linux Foundation nor the names of its 14 * contributors may be used to endorse or promote products derived 15 * from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED 18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS 21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 24 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 26 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN 27 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 #ifndef __DRM_INTERFACE_H__ 31 #define __DRM_INTERFACE_H__ 32 33 #include <map> 34 #include <string> 35 #include <utility> 36 #include <vector> 37 38 #include "xf86drm.h" 39 #include "xf86drmMode.h" 40 #include <drm/msm_drm.h> 41 #include <drm/msm_drm_pp.h> 42 43 namespace sde_drm { 44 45 typedef std::map<std::pair<uint32_t, uint64_t>, float> CompRatioMap; 46 47 /* 48 * Drm Atomic Operation Codes 49 */ 50 enum struct DRMOps { 51 /* 52 * Op: Sets plane source crop 53 * Arg: uint32_t - Plane ID 54 * DRMRect - Source Rectangle 55 */ 56 PLANE_SET_SRC_RECT, 57 /* 58 * Op: Sets plane destination rect 59 * Arg: uint32_t - Plane ID 60 * DRMRect - Dst Rectangle 61 */ 62 PLANE_SET_DST_RECT, 63 /* 64 * Op: Sets plane exclusion rect 65 * Arg: uint32_t - Plane ID 66 * drm_clip_rect - Exclusion Rectangle 67 */ 68 PLANE_SET_EXCL_RECT, 69 /* 70 * Op: Sets plane zorder 71 * Arg: uint32_t - Plane ID 72 * uint32_t - zorder 73 */ 74 PLANE_SET_ZORDER, 75 /* 76 * Op: Sets plane rotation flags 77 * Arg: uint32_t - Plane ID 78 * uint32_t - bit mask of rotation flags (See drm_mode.h for enums) 79 */ 80 PLANE_SET_ROTATION, 81 /* 82 * Op: Sets plane alpha 83 * Arg: uint32_t - Plane ID 84 * uint32_t - alpha value 85 */ 86 PLANE_SET_ALPHA, 87 /* 88 * Op: Sets the blend type 89 * Arg: uint32_t - Plane ID 90 * uint32_t - blend type (see DRMBlendType) 91 */ 92 PLANE_SET_BLEND_TYPE, 93 /* 94 * Op: Sets horizontal decimation 95 * Arg: uint32_t - Plane ID 96 * uint32_t - decimation factor 97 */ 98 PLANE_SET_H_DECIMATION, 99 /* 100 * Op: Sets vertical decimation 101 * Arg: uint32_t - Plane ID 102 * uint32_t - decimation factor 103 */ 104 PLANE_SET_V_DECIMATION, 105 /* 106 * Op: Sets source config flags 107 * Arg: uint32_t - Plane ID 108 * uint32_t - flags to enable or disable a specific op. E.g. deinterlacing 109 */ 110 PLANE_SET_SRC_CONFIG, 111 /* 112 * Op: Sets frame buffer ID for plane. Set together with CRTC. 113 * Arg: uint32_t - Plane ID 114 * uint32_t - Framebuffer ID 115 */ 116 PLANE_SET_FB_ID, 117 /* 118 * Op: Sets the crtc for this plane. Set together with FB_ID. 119 * Arg: uint32_t - Plane ID 120 * uint32_t - CRTC ID 121 */ 122 PLANE_SET_CRTC, 123 /* 124 * Op: Sets acquire fence for this plane's buffer. Set together with FB_ID, CRTC. 125 * Arg: uint32_t - Plane ID 126 * uint32_t - Input fence 127 */ 128 PLANE_SET_INPUT_FENCE, 129 /* 130 * Op: Sets scaler config on this plane. 131 * Arg: uint32_t - Plane ID 132 * uint64_t - Address of the scaler config object (version based) 133 */ 134 PLANE_SET_SCALER_CONFIG, 135 /* 136 * Op: Sets plane rotation destination rect 137 * Arg: uint32_t - Plane ID 138 * DRMRect - rotator dst Rectangle 139 */ 140 PLANE_SET_ROTATION_DST_RECT, 141 /* 142 * Op: Sets FB Secure mode for this plane. 143 * Arg: uint32_t - Plane ID 144 * uint32_t - Value of the FB Secure mode. 145 */ 146 PLANE_SET_FB_SECURE_MODE, 147 /* 148 * Op: Sets csc config on this plane. 149 * Arg: uint32_t - Plane ID 150 * uint32_t* - pointer to csc type 151 */ 152 PLANE_SET_CSC_CONFIG, 153 /* 154 * Op: Sets multirect mode on this plane. 155 * Arg: uint32_t - Plane ID 156 * uint32_t - multirect mode 157 */ 158 PLANE_SET_MULTIRECT_MODE, 159 /* 160 * Op: Sets rotator output frame buffer ID for plane. 161 * Arg: uint32_t - Plane ID 162 * uint32_t - Framebuffer ID 163 */ 164 PLANE_SET_ROT_FB_ID, 165 /* 166 * Op: Sets inverse pma mode on this plane. 167 * Arg: uint32_t - Plane ID 168 * uint32_t - enable/disable inverse pma. 169 */ 170 PLANE_SET_INVERSE_PMA, 171 /* 172 * Op: Sets csc config on this plane. 173 * Arg: uint32_t - Plane ID 174 * uint64_t - Address of the csc config object(version based) 175 */ 176 PLANE_SET_DGM_CSC_CONFIG, 177 /* 178 * Op: Sets SSPP Feature 179 * Arg: uint32_t - Plane ID 180 * DRMPPFeatureInfo * - PP feature data pointer 181 */ 182 PLANE_SET_POST_PROC, 183 /* 184 * Op: Activate or deactivate a CRTC 185 * Arg: uint32_t - CRTC ID 186 * uint32_t - 1 to enable, 0 to disable 187 */ 188 CRTC_SET_ACTIVE, 189 /* 190 * Op: Sets display mode 191 * Arg: uint32_t - CRTC ID 192 * drmModeModeInfo* - Pointer to display mode 193 */ 194 CRTC_SET_MODE, 195 /* 196 * Op: Sets an offset indicating when a release fence should be signalled. 197 * Arg: uint32_t - offset 198 * 0: non-speculative, default 199 * 1: speculative 200 */ 201 CRTC_SET_OUTPUT_FENCE_OFFSET, 202 /* 203 * Op: Sets overall SDE core clock 204 * Arg: uint32_t - CRTC ID 205 * uint32_t - core_clk 206 */ 207 CRTC_SET_CORE_CLK, 208 /* 209 * Op: Sets MNOC bus average bandwidth 210 * Arg: uint32_t - CRTC ID 211 * uint32_t - core_ab 212 */ 213 CRTC_SET_CORE_AB, 214 /* 215 * Op: Sets MNOC bus instantaneous bandwidth 216 * Arg: uint32_t - CRTC ID 217 * uint32_t - core_ib 218 */ 219 CRTC_SET_CORE_IB, 220 /* 221 * Op: Sets LLCC Bus average bandwidth 222 * Arg: uint32_t - CRTC ID 223 * uint32_t - llcc_ab 224 */ 225 CRTC_SET_LLCC_AB, 226 /* 227 * Op: Sets LLCC Bus instantaneous bandwidth 228 * Arg: uint32_t - CRTC ID 229 * uint32_t - llcc_ib 230 */ 231 CRTC_SET_LLCC_IB, 232 /* 233 * Op: Sets DRAM bus average bandwidth 234 * Arg: uint32_t - CRTC ID 235 * uint32_t - dram_ab 236 */ 237 CRTC_SET_DRAM_AB, 238 /* 239 * Op: Sets DRAM bus instantaneous bandwidth 240 * Arg: uint32_t - CRTC ID 241 * uint32_t - dram_ib 242 */ 243 CRTC_SET_DRAM_IB, 244 /* 245 * Op: Sets Rotator BW for inline rotation 246 * Arg: uint32_t - CRTC ID 247 * uint32_t - rot_bw 248 */ 249 CRTC_SET_ROT_PREFILL_BW, 250 /* 251 * Op: Sets rotator clock for inline rotation 252 * Arg: uint32_t - CRTC ID 253 * uint32_t - rot_clk 254 */ 255 CRTC_SET_ROT_CLK, 256 /* 257 * Op: Sets destination scalar data 258 * Arg: uint32_t - CRTC ID 259 * uint64_t - Pointer to destination scalar data 260 */ 261 CRTC_SET_DEST_SCALER_CONFIG, 262 /* 263 * Op: Returns release fence for this frame. Should be called after Commit() on 264 * DRMAtomicReqInterface. 265 * Arg: uint32_t - CRTC ID 266 * int * - Pointer to an integer that will hold the returned fence 267 */ 268 CRTC_GET_RELEASE_FENCE, 269 /* 270 * Op: Sets PP feature 271 * Arg: uint32_t - CRTC ID 272 * DRMPPFeatureInfo * - PP feature data pointer 273 */ 274 CRTC_SET_POST_PROC, 275 /* 276 * Op: Sets CRTC ROIs. 277 * Arg: uint32_t - CRTC ID 278 * uint32_t - number of ROIs 279 * DRMRect * - Array of CRTC ROIs 280 */ 281 CRTC_SET_ROI, 282 /* 283 * Op: Sets Security level for CRTC. 284 * Arg: uint32_t - CRTC ID 285 * uint32_t - Security level 286 */ 287 CRTC_SET_SECURITY_LEVEL, 288 /* 289 * Op: sets solid fill stages 290 * Arg: uint32_t - CRTC ID 291 * Vector of DRMSolidfillStage 292 */ 293 CRTC_SET_SOLIDFILL_STAGES, 294 /* 295 * Op: Sets idle timeout. 296 * Arg: uint32_t - CRTC ID 297 * uint32_t - idle timeout in ms 298 */ 299 CRTC_SET_IDLE_TIMEOUT, 300 /* 301 * Op: Sets Capture mode for Concurrent Writeback feature. 302 * Arg: uint32_t - CRTC ID 303 * uint32_t - Capture mode 304 */ 305 CRTC_SET_CAPTURE_MODE, 306 /* 307 * Op: Sets Idle PC state for CRTC. 308 * Arg: uint32_t - CRTC ID 309 * uint32_t - idle pc state 310 */ 311 CRTC_SET_IDLE_PC_STATE, 312 /* 313 * Op: Returns retire fence for this commit. Should be called after Commit() on 314 * DRMAtomicReqInterface. 315 * Arg: uint32_t - Connector ID 316 * int * - Pointer to an integer that will hold the returned fence 317 */ 318 CONNECTOR_GET_RETIRE_FENCE, 319 /* 320 * Op: Sets writeback connector destination rect 321 * Arg: uint32_t - Connector ID 322 * DRMRect - Dst Rectangle 323 */ 324 CONNECTOR_SET_OUTPUT_RECT, 325 /* 326 * Op: Sets frame buffer ID for writeback connector. 327 * Arg: uint32_t - Connector ID 328 * uint32_t - Framebuffer ID 329 */ 330 CONNECTOR_SET_OUTPUT_FB_ID, 331 /* 332 * Op: Sets power mode for connector. 333 * Arg: uint32_t - Connector ID 334 * uint32_t - Power Mode 335 */ 336 CONNECTOR_SET_POWER_MODE, 337 /* 338 * Op: Sets panel ROIs. 339 * Arg: uint32_t - Connector ID 340 * uint32_t - number of ROIs 341 * DRMRect * - Array of Connector ROIs 342 */ 343 CONNECTOR_SET_ROI, 344 /* 345 * Op: Sets the connector to autorefresh mode. 346 * Arg: uint32_t - Connector ID 347 * uint32_t - Enable-1, Disable-0 348 */ 349 CONNECTOR_SET_AUTOREFRESH, 350 /* 351 * Op: Set FB secure mode for Writeback connector. 352 * Arg: uint32_t - Connector ID 353 * uint32_t - FB Secure mode 354 */ 355 CONNECTOR_SET_FB_SECURE_MODE, 356 /* 357 * Op: Sets a crtc id to this connector 358 * Arg: uint32_t - Connector ID 359 * uint32_t - CRTC ID 360 */ 361 CONNECTOR_SET_CRTC, 362 /* 363 * Op: Sets PP feature 364 * Arg: uint32_t - Connector ID 365 * DRMPPFeatureInfo * - PP feature data pointer 366 */ 367 CONNECTOR_SET_POST_PROC, 368 /* 369 * Op: Sets connector hdr metadata 370 * Arg: uint32_t - Connector ID 371 * drm_msm_ext_hdr_metadata - hdr_metadata 372 */ 373 CONNECTOR_SET_HDR_METADATA, 374 /* 375 * Op: Cache Dpps features. 376 * Arg: uint32_t - Object ID 377 uint32_t - Feature ID 378 * uint64_t - Pointer to feature config data 379 */ 380 DPPS_CACHE_FEATURE, 381 /* 382 * Op: Commit Dpps features. 383 * Arg: drmModeAtomicReq - Atomic request 384 */ 385 DPPS_COMMIT_FEATURE, 386 /* 387 * Op: Sets qsync mode on connector 388 * Arg: uint32_t - Connector ID 389 * uint32_t - qsync mode 390 */ 391 CONNECTOR_SET_QSYNC_MODE, 392 /* 393 * Op: Sets topology control on this connector 394 * Arg: uint32_t - Connector ID 395 * uint32_t - Topology control bit-mask 396 */ 397 CONNECTOR_SET_TOPOLOGY_CONTROL, 398 }; 399 400 enum struct DRMRotation { 401 FLIP_H = 0x1, 402 FLIP_V = 0x2, 403 ROT_180 = FLIP_H | FLIP_V, 404 ROT_90 = 0x4, 405 }; 406 407 enum struct DRMPowerMode { 408 ON, 409 DOZE, 410 DOZE_SUSPEND, 411 OFF, 412 }; 413 414 enum struct DRMBlendType { 415 UNDEFINED = 0, 416 OPAQUE = 1, 417 PREMULTIPLIED = 2, 418 COVERAGE = 3, 419 }; 420 421 enum struct DRMSrcConfig { 422 DEINTERLACE = 0, 423 }; 424 425 enum struct DRMIdlePCState { 426 NONE, 427 ENABLE, 428 DISABLE, 429 }; 430 431 432 /* Display type to identify a suitable connector */ 433 enum struct DRMDisplayType { 434 PERIPHERAL, 435 TV, 436 VIRTUAL, 437 }; 438 439 struct DRMRect { 440 uint32_t left; // Left-most pixel coordinate. 441 uint32_t top; // Top-most pixel coordinate. 442 uint32_t right; // Right-most pixel coordinate. 443 uint32_t bottom; // Bottom-most pixel coordinate. 444 }; 445 446 //------------------------------------------------------------------------ 447 // DRM Info Query Types 448 //------------------------------------------------------------------------ 449 450 enum struct QSEEDVersion { 451 V1, 452 V2, 453 V3, 454 V3LITE, 455 }; 456 457 /* QSEED3 Step version */ 458 enum struct QSEEDStepVersion { 459 V2, 460 V3, 461 V4, 462 V3LITE_V4, 463 V3LITE_V5, 464 }; 465 466 enum struct SmartDMARevision { 467 V1, 468 V2, 469 V2p5 470 }; 471 472 /* Inline Rotation version */ 473 enum struct InlineRotationVersion { 474 UNKNOWN, 475 V1, 476 V1p1, // Rotator FB ID needs to be set 477 }; 478 479 /* Per CRTC Resource Info*/ 480 struct DRMCrtcInfo { 481 bool has_src_split; 482 bool has_hdr; 483 uint32_t max_blend_stages; 484 uint32_t max_solidfill_stages; 485 QSEEDVersion qseed_version; 486 SmartDMARevision smart_dma_rev; 487 float ib_fudge_factor; 488 float clk_fudge_factor; 489 uint32_t dest_scale_prefill_lines; 490 uint32_t undersized_prefill_lines; 491 uint32_t macrotile_prefill_lines; 492 uint32_t nv12_prefill_lines; 493 uint32_t linear_prefill_lines; 494 uint32_t downscale_prefill_lines; 495 uint32_t extra_prefill_lines; 496 uint32_t amortized_threshold; 497 uint64_t max_bandwidth_low; 498 uint64_t max_bandwidth_high; 499 uint32_t max_sde_clk; 500 CompRatioMap comp_ratio_rt_map; 501 CompRatioMap comp_ratio_nrt_map; 502 uint32_t hw_version; 503 uint32_t dest_scaler_count = 0; 504 uint32_t max_dest_scaler_input_width = 0; 505 uint32_t max_dest_scaler_output_width = 0; 506 uint32_t max_dest_scale_up = 1; 507 uint32_t min_prefill_lines = 0; 508 int secure_disp_blend_stage = -1; 509 bool concurrent_writeback = false; 510 uint32_t num_mnocports; 511 uint32_t mnoc_bus_width; 512 }; 513 514 enum struct DRMPlaneType { 515 // Has CSC and scaling capability 516 VIG = 0, 517 // Has scaling capability but no CSC 518 RGB, 519 // No scaling support 520 DMA, 521 // Supports a small dimension and doesn't use a CRTC stage 522 CURSOR, 523 MAX, 524 }; 525 526 enum struct DRMTonemapLutType { 527 DMA_1D_GC, 528 DMA_1D_IGC, 529 VIG_1D_IGC, 530 VIG_3D_GAMUT, 531 }; 532 533 struct DRMPlaneTypeInfo { 534 DRMPlaneType type; 535 uint32_t master_plane_id; 536 // FourCC format enum and modifier 537 std::vector<std::pair<uint32_t, uint64_t>> formats_supported; 538 uint32_t max_linewidth; 539 uint32_t max_scaler_linewidth; 540 uint32_t max_upscale; 541 uint32_t max_downscale; 542 uint32_t max_horizontal_deci; 543 uint32_t max_vertical_deci; 544 uint64_t max_pipe_bandwidth; 545 uint32_t cache_size; // cache size in bytes for inline rotation support. 546 bool has_excl_rect = false; 547 QSEEDStepVersion qseed3_version; 548 bool multirect_prop_present = false; 549 InlineRotationVersion inrot_version; // inline rotation version 550 bool inverse_pma = false; 551 uint32_t dgm_csc_version = 0; // csc used with DMA 552 std::map<DRMTonemapLutType, uint32_t> tonemap_lut_version_map = {}; 553 bool block_sec_ui = false; 554 }; 555 556 // All DRM Planes as map<Plane_id , plane_type_info> listed from highest to lowest priority 557 typedef std::vector<std::pair<uint32_t, DRMPlaneTypeInfo>> DRMPlanesInfo; 558 559 enum struct DRMTopology { 560 UNKNOWN, // To be compat with driver defs in sde_rm.h 561 SINGLE_LM, 562 SINGLE_LM_DSC, 563 DUAL_LM, 564 DUAL_LM_DSC, 565 DUAL_LM_MERGE, 566 DUAL_LM_MERGE_DSC, 567 DUAL_LM_DSCMERGE, 568 PPSPLIT, 569 }; 570 571 enum struct DRMPanelMode { 572 VIDEO, 573 COMMAND, 574 }; 575 576 /* Per mode info */ 577 struct DRMModeInfo { 578 drmModeModeInfo mode; 579 DRMTopology topology; 580 // Valid only if mode is command 581 int num_roi; 582 int xstart; 583 int ystart; 584 int walign; 585 int halign; 586 int wmin; 587 int hmin; 588 bool roi_merge; 589 uint64_t bit_clk_rate; 590 uint32_t transfer_time_us; 591 }; 592 593 /* Per Connector Info*/ 594 struct DRMConnectorInfo { 595 uint32_t mmWidth; 596 uint32_t mmHeight; 597 uint32_t type; 598 std::vector<DRMModeInfo> modes; 599 std::string panel_name; 600 DRMPanelMode panel_mode; 601 bool is_primary; 602 // Valid only if DRMPanelMode is VIDEO 603 bool dynamic_fps; 604 // FourCC format enum and modifier 605 std::vector<std::pair<uint32_t, uint64_t>> formats_supported; 606 // Valid only if type is DRM_MODE_CONNECTOR_VIRTUAL 607 uint32_t max_linewidth; 608 DRMRotation panel_orientation; 609 drm_panel_hdr_properties panel_hdr_prop; 610 drm_msm_ext_hdr_properties ext_hdr_prop; 611 bool qsync_support; 612 // Connection status of this connector 613 bool is_connected; 614 bool is_wb_ubwc_supported; 615 uint32_t topology_control; 616 bool dyn_bitclk_support; 617 std::vector<uint8_t> edid; 618 }; 619 620 // All DRM Connectors as map<Connector_id , connector_info> 621 typedef std::map<uint32_t, DRMConnectorInfo> DRMConnectorsInfo; 622 623 /* Per Encoder Info */ 624 struct DRMEncoderInfo { 625 uint32_t type; 626 }; 627 628 // All DRM Encoders as map<Encoder_id , encoder_info> 629 typedef std::map<uint32_t, DRMEncoderInfo> DRMEncodersInfo; 630 631 /* Identifier token for a display */ 632 struct DRMDisplayToken { 633 uint32_t conn_id; 634 uint32_t crtc_id; 635 uint32_t crtc_index; 636 uint32_t encoder_id; 637 uint8_t hw_port; 638 }; 639 640 enum DRMPPFeatureID { 641 kFeaturePcc, 642 kFeatureIgc, 643 kFeaturePgc, 644 kFeatureMixerGc, 645 kFeaturePaV2, 646 kFeatureDither, 647 kFeatureGamut, 648 kFeaturePADither, 649 kFeaturePAHsic, 650 kFeaturePASixZone, 651 kFeaturePAMemColSkin, 652 kFeaturePAMemColSky, 653 kFeaturePAMemColFoliage, 654 kFeaturePAMemColProt, 655 kFeatureDgmIgc, 656 kFeatureDgmGc, 657 kFeatureVigIgc, 658 kFeatureVigGamut, 659 kPPFeaturesMax, 660 }; 661 662 enum DRMPPPropType { 663 kPropEnum, 664 kPropRange, 665 kPropBlob, 666 kPropTypeMax, 667 }; 668 669 struct DRMPPFeatureInfo { 670 DRMPPFeatureID id; 671 DRMPPPropType type; 672 uint32_t version; 673 uint32_t payload_size; 674 void *payload; 675 uint32_t object_type; 676 }; 677 678 enum DRMDPPSFeatureID { 679 // Ad4 properties 680 kFeatureAd4Mode, 681 kFeatureAd4Init, 682 kFeatureAd4Cfg, 683 kFeatureAd4Input, 684 kFeatureAd4Roi, 685 kFeatureAd4Backlight, 686 kFeatureAd4Assertiveness, 687 kFeatureAd4ManualStrength, 688 // ABA properties 689 kFeatureAbaHistCtrl, 690 kFeatureAbaHistIRQ, 691 kFeatureAbaLut, 692 // BL scale properties 693 kFeatureAd4BlScale, 694 kFeatureBacklightScale, 695 // Events 696 kFeaturePowerEvent, 697 kFeatureAbaHistEvent, 698 kFeatureBackLightEvent, 699 kFeatureAdAttBlEvent, 700 // Insert features above 701 kDppsFeaturesMax, 702 }; 703 704 struct DppsFeaturePayload { 705 uint32_t object_type; 706 uint32_t feature_id; 707 uint64_t value; 708 }; 709 710 struct DRMDppsFeatureInfo { 711 DRMDPPSFeatureID id; 712 uint32_t version; 713 }; 714 715 enum AD4Modes { 716 kAd4Off, 717 kAd4AutoStrength, 718 kAd4Calibration, 719 kAd4Manual, 720 kAd4ModeMax, 721 }; 722 723 enum HistModes { 724 kHistDisabled, 725 kHistEnabled, 726 }; 727 728 struct DRMDppsEventInfo { 729 uint32_t object_type; 730 uint32_t event_type; 731 int drm_fd; 732 bool enable; 733 }; 734 735 enum DRMCscType { 736 kCscYuv2Rgb601L, 737 kCscYuv2Rgb601FR, 738 kCscYuv2Rgb709L, 739 kCscYuv2Rgb2020L, 740 kCscYuv2Rgb2020FR, 741 kCscTypeMax, 742 }; 743 744 struct DRMScalerLUTInfo { 745 uint32_t dir_lut_size = 0; 746 uint32_t cir_lut_size = 0; 747 uint32_t sep_lut_size = 0; 748 uint64_t dir_lut = 0; 749 uint64_t cir_lut = 0; 750 uint64_t sep_lut = 0; 751 }; 752 753 enum struct DRMSecureMode { 754 NON_SECURE, 755 SECURE, 756 NON_SECURE_DIR_TRANSLATION, 757 SECURE_DIR_TRANSLATION, 758 }; 759 760 enum struct DRMSecurityLevel { 761 SECURE_NON_SECURE, 762 SECURE_ONLY, 763 }; 764 765 enum struct DRMMultiRectMode { 766 NONE = 0, 767 PARALLEL = 1, 768 SERIAL = 2, 769 }; 770 771 enum struct DRMCWbCaptureMode { 772 MIXER_OUT = 0, 773 DSPP_OUT = 1, 774 }; 775 776 enum struct DRMQsyncMode { 777 NONE = 0, 778 CONTINUOUS, 779 }; 780 781 enum struct DRMTopologyControl { 782 NONE = 0, 783 RESERVE_LOCK = 1 << 0, 784 RESERVE_CLEAR = 1 << 1, 785 DSPP = 1 << 2, 786 DEST_SCALER = 1 << 3, 787 }; 788 789 struct DRMSolidfillStage { 790 DRMRect bounding_rect {}; 791 bool is_exclusion_rect = false; 792 uint32_t color = 0xff000000; // in 8bit argb 793 uint32_t red = 0; 794 uint32_t blue = 0; 795 uint32_t green = 0; 796 uint32_t alpha = 0xff; 797 uint32_t color_bit_depth = 0; 798 uint32_t z_order = 0; 799 uint32_t plane_alpha = 0xff; 800 }; 801 802 /* DRM Atomic Request Property Set. 803 * 804 * Helper class to create and populate atomic properties of DRM components 805 * when rendered in DRM atomic mode */ 806 class DRMAtomicReqInterface { 807 public: ~DRMAtomicReqInterface()808 virtual ~DRMAtomicReqInterface() {} 809 /* Perform request operation. 810 * 811 * [input]: opcode: operation code from DRMOps list. 812 * obj_id: Relevant crtc, connector, plane id 813 * var_arg: arguments for DRMOps's can differ in number and 814 * data type. Refer above DRMOps to details. 815 * [return]: Error code if the API fails, 0 on success. 816 */ 817 virtual int Perform(DRMOps opcode, uint32_t obj_id, ...) = 0; 818 819 /* 820 * Commit the params set via Perform(). Also resets the properties after commit. Needs to be 821 * called every frame. 822 * [input]: synchronous: Determines if the call should block until a h/w flip 823 * [input]: retain_planes: Retains already staged planes. Useful when not explicitly programming 824 * planes but still need the previously staged ones to not be unstaged 825 * [return]: Error code if the API fails, 0 on success. 826 */ 827 virtual int Commit(bool synchronous, bool retain_planes) = 0; 828 829 /* 830 * Validate the params set via Perform(). 831 * [return]: Error code if the API fails, 0 on success. 832 */ 833 virtual int Validate() = 0; 834 }; 835 836 class DRMManagerInterface; 837 838 /* Populates a singleton instance of DRMManager */ 839 typedef int (*GetDRMManager)(int fd, DRMManagerInterface **intf); 840 841 /* Destroy DRMManager instance */ 842 typedef int (*DestroyDRMManager)(); 843 844 /* 845 * DRM Manager Interface - Any class which plans to implement helper function for vendor 846 * specific DRM driver implementation must implement the below interface routines to work 847 * with SDM. 848 */ 849 850 class DRMManagerInterface { 851 public: ~DRMManagerInterface()852 virtual ~DRMManagerInterface() {} 853 854 /* 855 * Since SDM completely manages the planes. GetPlanesInfo will provide all 856 * the plane information. 857 * [output]: DRMPlanesInfo: Resource Info for planes. 858 */ 859 virtual void GetPlanesInfo(DRMPlanesInfo *info) = 0; 860 861 /* 862 * Will provide all the information of a selected crtc. 863 * [input]: Use crtc id 0 to obtain system wide info 864 * [output]: DRMCrtcInfo: Resource Info for the given CRTC id. 865 * [return]: 0 on success, a negative error value otherwise. 866 */ 867 virtual int GetCrtcInfo(uint32_t crtc_id, DRMCrtcInfo *info) = 0; 868 869 /* 870 * Will provide all the information of a selected connector. 871 * [output]: DRMConnectorInfo: Resource Info for the given connector id 872 * [return]: 0 on success, a negative error value otherwise. 873 */ 874 virtual int GetConnectorInfo(uint32_t conn_id, DRMConnectorInfo *info) = 0; 875 876 /* 877 * Provides information on all connectors. 878 * [output]: DRMConnectorsInfo: Resource info for connectors. 879 * [return]: 0 on success, a negative error value otherwise. 880 */ 881 virtual int GetConnectorsInfo(DRMConnectorsInfo *info) = 0; 882 883 /* 884 * Provides information on a selected encoder. 885 * [output]: DRMEncoderInfo: Resource info for the given encoder id. 886 * [return]: 0 on success, a negative error value otherwise. 887 */ 888 virtual int GetEncoderInfo(uint32_t encoder_id, DRMEncoderInfo *info) = 0; 889 890 /* 891 * Provides information on all encoders. 892 * [output]: DRMEncodersInfo: Resource info for encoders. 893 * [return]: 0 on success, a negative error value otherwise. 894 */ 895 virtual int GetEncodersInfo(DRMEncodersInfo *info) = 0; 896 897 /* 898 * Will query post propcessing feature info of a CRTC. 899 * [output]: DRMPPFeatureInfo: CRTC post processing feature info 900 */ 901 virtual void GetCrtcPPInfo(uint32_t crtc_id, DRMPPFeatureInfo *info) = 0; 902 903 /* 904 * Register a logical display to receive a token. 905 * Each display pipeline in DRM is identified by its CRTC and Connector(s). On display connect 906 * (bootup or hotplug), clients should invoke this interface to establish the pipeline for the 907 * display and should get a DisplayToken populated with crtc, encoder and connnector(s) id's. Here 908 * onwards, Client should use this token to represent the display for any Perform operations if 909 * needed. 910 * 911 * [input]: disp_type - Peripheral / TV / Virtual 912 * [output]: DRMDisplayToken - CRTC and Connector IDs for the display. 913 * [return]: 0 on success, a negative error value otherwise. 914 */ 915 virtual int RegisterDisplay(DRMDisplayType disp_type, DRMDisplayToken *tok) = 0; 916 917 /* 918 * Register a logical display to receive a token. 919 * Each display pipeline in DRM is identified by its CRTC and Connector(s). On display connect 920 * (bootup or hotplug), clients should invoke this interface to establish the pipeline for the 921 * display and should get a DisplayToken populated with crtc, encoder and connnector(s) id's. Here 922 * onwards, Client should use this token to represent the display for any Perform operations if 923 * needed. 924 * 925 * [input]: display_id - Connector ID 926 * [output]: DRMDisplayToken - CRTC and Connector id's for the display. 927 * [return]: 0 on success, a negative error value otherwise. 928 */ 929 virtual int RegisterDisplay(int32_t display_id, DRMDisplayToken *token) = 0; 930 931 /* Client should invoke this interface on display disconnect. 932 * [input]: DRMDisplayToken - identifier for the display. 933 */ 934 virtual void UnregisterDisplay(DRMDisplayToken *token) = 0; 935 936 /* 937 * Creates and returns an instance of DRMAtomicReqInterface corresponding to a display token 938 * returned as part of RegisterDisplay API. Needs to be called per display. 939 * [input]: DRMDisplayToken that identifies a display pipeline 940 * [output]: Pointer to an instance of DRMAtomicReqInterface. 941 * [return]: Error code if the API fails, 0 on success. 942 */ 943 virtual int CreateAtomicReq(const DRMDisplayToken &token, DRMAtomicReqInterface **intf) = 0; 944 945 /* 946 * Destroys the instance of DRMAtomicReqInterface 947 * [input]: Pointer to a DRMAtomicReqInterface 948 * [return]: Error code if the API fails, 0 on success. 949 */ 950 virtual int DestroyAtomicReq(DRMAtomicReqInterface *intf) = 0; 951 952 /* 953 * Sets the global scaler LUT 954 * [input]: LUT Info 955 * [return]: Error code if the API fails, 0 on success. 956 */ 957 virtual int SetScalerLUT(const DRMScalerLUTInfo &lut_info) = 0; 958 959 /* 960 * Unsets the global scaler LUT 961 * [input]: None 962 * [return]: Error code if the API fails, 0 on success. 963 */ 964 virtual int UnsetScalerLUT() = 0; 965 966 /* 967 * Get the DPPS feature info 968 * [input]: Dpps feature id, info->id 969 * [output]: Dpps feature version, info->version 970 */ 971 virtual void GetDppsFeatureInfo(DRMDppsFeatureInfo *info) = 0; 972 }; 973 974 } // namespace sde_drm 975 #endif // __DRM_INTERFACE_H__ 976