1/*
2 * Copyright (C) 2008 The Android Open Source Project
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *  * Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 *  * Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in
12 *    the documentation and/or other materials provided with the
13 *    distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
18 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
19 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
22 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
25 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29#include <private/bionic_asm.h>
30
31        /*
32         * Optimized memset() for ARM.
33         *
34         * memset() returns its first argument.
35         */
36
37         .syntax unified
38
39ENTRY(__memset_chk_generic)
40        cmp         r2, r3
41        bls         memset
42
43        bl          __memset_chk_fail
44END(__memset_chk_generic)
45
46ENTRY(memset_generic)
47        /* compute the offset to align the destination
48         * offset = (4-(src&3))&3 = -src & 3
49         */
50        .save       {r0, r4-r7, lr}
51        stmfd       sp!, {r0, r4-r7, lr}
52        rsb         r3, r0, #0
53        ands        r3, r3, #3
54        cmp         r3, r2
55        movhi       r3, r2
56
57        /* splat r1 */
58        mov         r1, r1, lsl #24
59        orr         r1, r1, r1, lsr #8
60        orr         r1, r1, r1, lsr #16
61
62        movs        r12, r3, lsl #31
63        strbcs      r1, [r0], #1    /* can't use strh (alignment unknown) */
64        strbcs      r1, [r0], #1
65        strbmi      r1, [r0], #1
66        subs        r2, r2, r3
67        popls       {r0, r4-r7, pc}    /* return */
68
69        /* align the destination to a cache-line */
70        mov         r12, r1
71        mov         lr, r1
72        mov         r4, r1
73        mov         r5, r1
74        mov         r6, r1
75        mov         r7, r1
76
77        rsb         r3, r0, #0
78        ands        r3, r3, #0x1C
79        beq         3f
80        cmp         r3, r2
81        andhi       r3, r2, #0x1C
82        sub         r2, r2, r3
83
84        /* conditionally writes 0 to 7 words (length in r3) */
85        movs        r3, r3, lsl #28
86        stmcs       r0!, {r1, lr}
87        stmcs       r0!, {r1, lr}
88        stmmi       r0!, {r1, lr}
89        movs        r3, r3, lsl #2
90        strcs       r1, [r0], #4
91
923:
93        subs        r2, r2, #32
94        mov         r3, r1
95        bmi         2f
961:      subs        r2, r2, #32
97        stmia       r0!, {r1,r3,r4,r5,r6,r7,r12,lr}
98        bhs         1b
992:      add         r2, r2, #32
100
101        /* conditionally stores 0 to 31 bytes */
102        movs        r2, r2, lsl #28
103        stmcs       r0!, {r1,r3,r12,lr}
104        stmmi       r0!, {r1, lr}
105        movs        r2, r2, lsl #2
106        strcs       r1, [r0], #4
107        strhmi      r1, [r0], #2
108        movs        r2, r2, lsl #2
109        strbcs      r1, [r0]
110        ldmfd       sp!, {r0, r4-r7, pc}
111END(memset_generic)
112