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Searched refs:GetCode (Results 1 – 24 of 24) sorted by relevance

/art/compiler/optimizing/
Dcommon_arm.h150 vixl::aarch32::DRegister d = vixl::aarch32::DRegister(s.GetCode() / 2); in DRegisterFromS()
204 return Location::RegisterLocation(reg.GetCode()); in LocationFrom()
208 return Location::FpuRegisterLocation(reg.GetCode()); in LocationFrom()
213 return Location::RegisterPairLocation(low.GetCode(), high.GetCode()); in LocationFrom()
218 return Location::FpuRegisterPairLocation(low.GetCode(), high.GetCode()); in LocationFrom()
Dcode_generator_arm64.h105 return Location::RegisterLocation(vixl::aarch64::x15.GetCode()); in FixedTempLocation()
114 ? vixl::aarch64::x21.GetCode()
115 : vixl::aarch64::x20.GetCode()),
116 vixl::aarch64::x30.GetCode());
119 vixl::aarch64::d8.GetCode(),
120 vixl::aarch64::d15.GetCode());
944 DCHECK(reg < vixl::aarch64::lr.GetCode() && in CheckValidReg()
945 reg != vixl::aarch64::ip0.GetCode() && in CheckValidReg()
946 reg != vixl::aarch64::ip1.GetCode()) << reg; in CheckValidReg()
Dcommon_arm64.h206 return Location::RegisterLocation(ARTRegCodeFromVIXL(reg.GetCode())); in LocationFrom()
210 return Location::FpuRegisterLocation(fpreg.GetCode()); in LocationFrom()
Dcode_generator_arm64.cc155 caller_saves.Add(Location::RegisterLocation(calling_convention.GetRegisterAt(0).GetCode())); in OneRegInReferenceOutSaveEverythingCallerSaves()
156 DCHECK_EQ(calling_convention.GetRegisterAt(0).GetCode(), in OneRegInReferenceOutSaveEverythingCallerSaves()
158 DataType::Type::kReference).GetCode()); in OneRegInReferenceOutSaveEverythingCallerSaves()
763 size_t ref = static_cast<int>(XRegisterFrom(ref_).GetCode()); in FindAvailableCallerSaveRegister()
764 size_t obj = static_cast<int>(XRegisterFrom(obj_).GetCode()); in FindAvailableCallerSaveRegister()
914 return Location::RegisterLocation(x15.GetCode()); in GetMethodLocation()
1365 blocked_core_registers_[reserved_core_registers.PopLowestIndex().GetCode()] = true; in SetupBlockedRegisters()
1371 blocked_fpu_registers_[reserved_fp_registers.PopLowestIndex().GetCode()] = true; in SetupBlockedRegisters()
1380 blocked_fpu_registers_[reserved_fp_registers_debuggable.PopLowestIndex().GetCode()] = true; in SetupBlockedRegisters()
2821 caller_saves.Add(Location::RegisterLocation(calling_convention.GetRegisterAt(0).GetCode())); in VisitBoundsCheck()
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Doptimizing_compiler.cc1191 jni_compiled_method.GetCode(), in JniCompile()
1252 jni_compiled_method.GetCode().size(), in JitCompile()
1279 info.code_size = jni_compiled_method.GetCode().size(); in JitCompile()
1290 jni_compiled_method.GetCode(), in JitCompile()
1305 jit_logger->WriteLog(code, jni_compiled_method.GetCode().size(), method); in JitCompile()
Dcode_generator_arm_vixl.cc129 DCHECK_EQ(raw_adr[3] & 0x8fu, rd_.GetCode()); // Check bits 8-11 and 15. in ~EmitAdrCode()
754 DCHECK(!locations->GetLiveRegisters()->ContainsCoreRegister(reg_out.GetCode())); in EmitNativeCode()
781 DCHECK(locations->GetLiveRegisters()->ContainsCoreRegister(index_reg.GetCode())); in EmitNativeCode()
782 if (codegen->IsCoreCalleeSaveRegister(index_reg.GetCode())) { in EmitNativeCode()
879 uint32_t ref = RegisterFrom(ref_).GetCode(); in FindAvailableCallerSaveRegister()
880 uint32_t obj = RegisterFrom(obj_).GetCode(); in FindAvailableCallerSaveRegister()
919 DCHECK(!locations->GetLiveRegisters()->ContainsCoreRegister(reg_out.GetCode())); in EmitNativeCode()
1030 for (uint32_t i = regs.GetFirstSRegister().GetCode(); in ComputeSRegisterListMask()
1031 i <= regs.GetLastSRegister().GetCode(); in ComputeSRegisterListMask()
2050 for (uint32_t i = kFpuCalleeSaves.GetFirstSRegister().GetCode(); in SetupBlockedRegisters()
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Dcodegen_test.cc875 uint32_t reg_code = reg_list.PopLowestIndex().GetCode(); in TEST_F()
895 uint32_t reg_code = reg_list.PopLowestIndex().GetCode(); in TEST_F()
Dcode_generator_arm_vixl.h835 DCHECK(reg < vixl::aarch32::ip.GetCode() && reg != mr.GetCode()) << reg; in CheckValidReg()
Dintrinsics_arm_vixl.cc176 Thread::ReadBarrierMarkEntryPointsOffset<kArmPointerSize>(tmp.GetCode()); in EmitNativeCode()
Dintrinsics_arm64.cc2801 Location::RegisterLocation(calling_convention.GetRegisterAt(0).GetCode())); in VisitIntegerValueOf()
/art/compiler/utils/arm/
Dassembler_arm_vixl.cc252 CHECK_NE(base.GetCode(), kIpCode); in StoreToOffset()
253 if ((reg.GetCode() != kIpCode) && in StoreToOffset()
255 ((type != kStoreWordPair) || (reg.GetCode() + 1 != kIpCode))) { in StoreToOffset()
264 tmp_reg = (base.GetCode() != 5) ? r5 : r6; in StoreToOffset()
266 if (base.GetCode() == kSpCode) { in StoreToOffset()
287 ___ Strd(reg, vixl32::Register(reg.GetCode() + 1), MemOperand(base, offset)); in StoreToOffset()
293 if ((tmp_reg.IsValid()) && (tmp_reg.GetCode() != kIpCode)) { in StoreToOffset()
348 ___ Ldrd(dest, vixl32::Register(dest.GetCode() + 1), MemOperand(base, offset)); in LoadFromOffset()
392 DCHECK_EQ(regs & (1u << base.GetCode()), 0u); in StoreRegisterList()
Dassembler_arm_vixl.h44 return dwarf::Reg::ArmCore(static_cast<int>(reg.GetCode())); in DWARFReg()
48 return dwarf::Reg::ArmFp(static_cast<int>(reg.GetCode())); in DWARFReg()
Djni_macro_assembler_arm_vixl.cc187 DCHECK_EQ(core_spill_mask & (1 << temp.GetCode()), 0) in RemoveFrame()
188 << "core_spill_mask hould not contain scratch register R" << temp.GetCode(); in RemoveFrame()
/art/compiler/utils/arm64/
Dassembler_arm64.h48 return dwarf::Reg::Arm64Fp(reg.GetCode()); in DWARFReg()
50 DCHECK_LT(reg.GetCode(), 31u); // X0 - X30. in DWARFReg()
51 return dwarf::Reg::Arm64Core(reg.GetCode()); in DWARFReg()
Djni_macro_assembler_arm64.cc790 core_reg_list.Combine(reg_x(reg.AsXRegister()).GetCode()); in BuildFrame()
793 fp_reg_list.Combine(reg_d(reg.AsDRegister()).GetCode()); in BuildFrame()
826 core_reg_list.Combine(reg_x(reg.AsXRegister()).GetCode()); in RemoveFrame()
829 fp_reg_list.Combine(reg_d(reg.AsDRegister()).GetCode()); in RemoveFrame()
869 << "core_reg_list should not contain scratch register X" << temp.GetCode(); in RemoveFrame()
/art/disassembler/
Ddisassembler_arm64.cc48 if (reg.GetCode() == TR) { in AppendRegisterNameToOutput()
51 } else if (reg.GetCode() == LR) { in AppendRegisterNameToOutput()
/art/runtime/jit/
Djit_code_cache.cc125 DCHECK(entrypoint == OatQuickMethodHeader::FromCodePointer(GetCode())->GetEntryPoint()); in UpdateEntryPoints()
158 const void* GetCode() const { in GetCode() function in art::jit::JitCodeCache::JniStubData
163 return GetCode() != nullptr; in IsCompiled()
329 return data.GetCode(); in GetJniStubCode()
500 FreeCodeAndData(method_header->GetCode()); in FreeAllMethodHeaders()
543 method_headers.insert(OatQuickMethodHeader::FromCodePointer(it->second.GetCode())); in RemoveMethodsIn()
844 FreeCodeAndData(it->second.GetCode()); in RemoveMethodLocked()
1059 const void* code = method_header->GetCode(); in Run()
1081 const void* code = method_header->GetCode(); in Run()
1218 if (!data.IsCompiled() || IsInZygoteExecSpace(data.GetCode())) { in GarbageCollectCache()
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/art/compiler/jni/quick/
Djni_compiler.h50 ArrayRef<const uint8_t> GetCode() const { return ArrayRef<const uint8_t>(code_); } in GetCode() function
/art/compiler/driver/
Dcompiled_method_storage.cc134 ArrayRef<const uint8_t> GetCode() const { in GetCode() function in art::CompiledMethodStorage::ThunkMapValue
246 return value.GetCode(); in GetThunkCode()
/art/runtime/
Doat_quick_method_header.h83 const uint8_t* GetCode() const { in GetCode() function
Dart_method.cc654 << " " << (uintptr_t)(method_header->GetCode() + method_header->GetCodeSize()); in GetOatQuickMethodHeader()
/art/dex2oat/linker/
Drelative_patcher_test.h294 *code = value.GetCode(); in GetThunkCode()
355 ArrayRef<const uint8_t> GetCode() const { return ArrayRef<const uint8_t>(code_); } in GetCode() function
/art/dex2oat/linker/arm/
Drelative_patcher_arm_base.cc48 ArrayRef<const uint8_t> GetCode() const { in GetCode() function in art::linker::ArmBaseRelativePatcher::ThunkData
216 if (UNLIKELY(!WriteThunk(out, pending_thunks_.front()->GetCode()))) { in WriteThunks()
/art/oatdump/
Doatdump.cc1228 : method_header->GetCode() - oat_file_.Begin(); in DumpOatMethod()