Searched refs:R4 (Results 1 – 7 of 7) sorted by relevance
/art/compiler/utils/ |
D | assembler_thumb_test.cc | 119 const ManagedRegister hidden_arg_register = ArmManagedRegister::FromCoreRegister(R4); in TEST_F() 199 #define R4 vixl::aarch32::r4 macro 205 __ LoadFromOffset(kLoadWord, R2, R4, 12); in TEST_F() 206 __ LoadFromOffset(kLoadWord, R2, R4, 0xfff); in TEST_F() 207 __ LoadFromOffset(kLoadWord, R2, R4, 0x1000); in TEST_F() 208 __ LoadFromOffset(kLoadWord, R2, R4, 0x1000a4); in TEST_F() 209 __ LoadFromOffset(kLoadWord, R2, R4, 0x101000); in TEST_F() 210 __ LoadFromOffset(kLoadWord, R4, R4, 0x101000); in TEST_F() 211 __ LoadFromOffset(kLoadUnsignedHalfword, R2, R4, 12); in TEST_F() 212 __ LoadFromOffset(kLoadUnsignedHalfword, R2, R4, 0xfff); in TEST_F() [all …]
|
/art/runtime/arch/arm/ |
D | registers_arm.h | 31 R4 = 4, enumerator
|
D | callee_save_frame_arm.h | 39 (1 << art::arm::R4) | (1 << art::arm::R9); 42 (1 << art::arm::R4) | (1 << art::arm::R9) | (1 << art::arm::R12);
|
/art/compiler/jni/quick/arm/ |
D | calling_convention_arm.cc | 128 ArmManagedRegister::FromCoreRegister(R4), 529 return callee_save.Equals(ArmManagedRegister::FromCoreRegister(R4)); in HiddenArgumentRegister() 533 [](Register reg) { return reg == R4; })); in HiddenArgumentRegister() 534 return ArmManagedRegister::FromCoreRegister(R4); in HiddenArgumentRegister()
|
/art/compiler/optimizing/ |
D | codegen_test_utils.h | 96 blocked_core_registers_[arm::R4] = true; in SetupBlockedRegisters()
|
D | code_generator_arm_vixl.cc | 2178 if (!blocked_core_registers_[R4]) { in GenerateFrameEntry() 2489 return Location::RegisterLocation(R4); in GetMethodLocation()
|
/art/compiler/utils/arm/ |
D | managed_register_arm_test.cc | 271 EXPECT_EQ(R4, reg.AsRegisterPairLow()); in TEST() 273 EXPECT_TRUE(reg.Equals(ArmManagedRegister::FromCoreRegisterPair(R4))); in TEST()
|