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Searched refs:RAX (Results 1 – 13 of 13) sorted by relevance

/art/compiler/utils/x86_64/
Dmanaged_register_x86_64.cc27 P(RAX, RDX) \
28 P(RAX, RCX) \
29 P(RAX, RBX) \
30 P(RAX, RDI) \
Dmanaged_register_x86_64_test.cc31 X86_64ManagedRegister reg = X86_64ManagedRegister::FromCpuRegister(RAX); in TEST()
37 EXPECT_EQ(RAX, reg.AsCpuRegister()); in TEST()
123 EXPECT_EQ(RAX, reg.AsRegisterPairLow()); in TEST()
132 EXPECT_EQ(RAX, reg.AsRegisterPairLow()); in TEST()
141 EXPECT_EQ(RAX, reg.AsRegisterPairLow()); in TEST()
150 EXPECT_EQ(RAX, reg.AsRegisterPairLow()); in TEST()
209 X86_64ManagedRegister reg_eax = X86_64ManagedRegister::FromCpuRegister(RAX); in TEST()
210 EXPECT_TRUE(reg_eax.Equals(X86_64ManagedRegister::FromCpuRegister(RAX))); in TEST()
221 EXPECT_TRUE(!reg_xmm0.Equals(X86_64ManagedRegister::FromCpuRegister(RAX))); in TEST()
232 EXPECT_TRUE(!reg_st0.Equals(X86_64ManagedRegister::FromCpuRegister(RAX))); in TEST()
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Dassembler_x86_64_test.cc155 x86_64::Address(x86_64::CpuRegister(x86_64::RAX), in SetUpHelpers()
163 x86_64::CpuRegister(x86_64::RAX), x86_64::TIMES_1, 15)); in SetUpHelpers()
173 addresses_.push_back(x86_64::Address(x86_64::CpuRegister(x86_64::RAX), -1)); in SetUpHelpers()
180 x86_64::CpuRegister(x86_64::RAX), x86_64::TIMES_1, 15)); in SetUpHelpers()
202 registers_.push_back(new x86_64::CpuRegister(x86_64::RAX)); in SetUpHelpers()
219 secondary_register_names_.emplace(x86_64::CpuRegister(x86_64::RAX), "eax"); in SetUpHelpers()
236 tertiary_register_names_.emplace(x86_64::CpuRegister(x86_64::RAX), "ax"); in SetUpHelpers()
253 quaternary_register_names_.emplace(x86_64::CpuRegister(x86_64::RAX), "al"); in SetUpHelpers()
1029 x86_64::Address(x86_64::CpuRegister(x86_64::RAX), 0), in TEST_F()
1032 x86_64::Address(x86_64::CpuRegister(x86_64::RAX), 0), in TEST_F()
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Dassembler_x86_64.h85 int ext = (rex_ & 1) != 0 ? x86_64::R8 : x86_64::RAX; in cpu_rm()
90 int ext = (rex_ & 2) != 0 ? x86_64::R8 : x86_64::RAX; in cpu_index()
95 int ext = (rex_ & 1) != 0 ? x86_64::R8 : x86_64::RAX; in cpu_base()
Dassembler_x86_64.cc332 EmitOperand(Register::RAX, dst); in movb()
393 EmitOperand(Register::RAX, dst); in movw()
3820 const bool src_rax = src.AsRegister() == RAX; in xchgl()
3821 const bool dst_rax = dst.AsRegister() == RAX; in xchgl()
3840 const bool src_rax = src.AsRegister() == RAX; in xchgq()
3841 const bool dst_rax = dst.AsRegister() == RAX; in xchgq()
3997 if (reg.AsRegister() == RAX) { in testl()
4004 } else if (reg.AsRegister() == RAX) { in testl()
4037 EmitOperand(Register::RAX, dst); in testb()
5173 } else if (operand.IsRegister(CpuRegister(RAX))) { in EmitComplex()
/art/compiler/jni/quick/x86_64/
Dcalling_convention_x86_64.cc103 return X86_64ManagedRegister::FromCpuRegister(RAX); in ReturnRegisterForShorty()
107 return X86_64ManagedRegister::FromCpuRegister(RAX); in ReturnRegisterForShorty()
120 return X86_64ManagedRegister::FromCpuRegister(RAX); in IntReturnRegister()
304 return callee_save.Equals(X86_64ManagedRegister::FromCpuRegister(RAX)); in HiddenArgumentRegister()
306 return X86_64ManagedRegister::FromCpuRegister(RAX); in HiddenArgumentRegister()
/art/runtime/arch/x86_64/
Dregisters_x86_64.cc29 if (rhs >= RAX && rhs <= R15) { in operator <<()
Dregisters_x86_64.h28 RAX = 0, enumerator
Dcontext_x86_64.cc66 gprs_[RAX] = const_cast<uintptr_t*>(&gZero); in SmashCallerSaves()
Dcallee_save_frame_x86_64.h40 (1 << art::x86_64::RAX) | (1 << art::x86_64::RCX) | (1 << art::x86_64::RDX) |
/art/compiler/optimizing/
Dcode_generator_x86_64.cc65 caller_saves.Add(Location::RegisterLocation(RAX)); in OneRegInReferenceOutSaveEverythingCallerSaves()
273 __ movl(CpuRegister(RAX), Immediate(type_index.index_)); in EmitNativeCode()
280 x86_64_codegen->Move(Location::RegisterLocation(RAX), source); in EmitNativeCode()
290 x86_64_codegen->Move(out, Location::RegisterLocation(RAX)); in EmitNativeCode()
320 __ movl(CpuRegister(RAX), Immediate(string_index.index_)); in EmitNativeCode()
326 x86_64_codegen->Move(locations->Out(), Location::RegisterLocation(RAX)); in EmitNativeCode()
383 x86_64_codegen->Move(locations->Out(), Location::RegisterLocation(RAX)); in EmitNativeCode()
650 __ movq(temp2_, CpuRegister(RAX)); in EmitNativeCode()
651 __ movl(CpuRegister(RAX), temp1_); in EmitNativeCode()
655 CpuRegister expected = CpuRegister(RAX); in EmitNativeCode()
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Dintrinsics_x86_64.cc1154 locations->SetOut(Location::RegisterLocation(RAX)); in VisitStringCompareTo()
1303 locations->SetInAt(1, Location::RegisterLocation(RAX)); in CreateStringIndexOfLocations()
1333 DCHECK_EQ(search_value.AsRegister(), RAX); in GenerateStringIndexOf()
1482 locations->SetOut(Location::RegisterLocation(RAX)); in VisitStringNewStringFromBytes()
1507 locations->SetOut(Location::RegisterLocation(RAX)); in VisitStringNewStringFromChars()
1526 locations->SetOut(Location::RegisterLocation(RAX)); in VisitStringNewStringFromString()
2019 locations->SetInAt(3, Location::RegisterLocation(RAX)); in CreateIntIntIntIntIntToInt()
2057 DCHECK_EQ(expected.AsRegister(), RAX); in GenCAS()
2606 Location::RegisterLocation(RAX), in VisitIntegerValueOf()
2690 locations->SetInAt(0, Location::RegisterLocation(RAX)); in VisitIntegerDivideUnsigned()
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Dcode_generator_x86_64.h118 return Location::RegisterLocation(RAX); in GetReturnLocation()