/art/compiler/utils/x86_64/ |
D | jni_macro_assembler_x86_64.cc | 71 __ subq(CpuRegister(RSP), Immediate(rest_of_frame)); in BuildFrame() 81 __ movsd(Address(CpuRegister(RSP), offset), spill.AsXmmRegister()); in BuildFrame() 90 __ movq(Address(CpuRegister(RSP), 0), method_reg.AsX86_64().AsCpuRegister()); in BuildFrame() 107 __ movsd(spill.AsXmmRegister(), Address(CpuRegister(RSP), offset)); in RemoveFrame() 117 __ addq(CpuRegister(RSP), Immediate(offset)); in RemoveFrame() 137 __ addq(CpuRegister(RSP), Immediate(-static_cast<int64_t>(adjust))); in IncreaseFrameSize() 145 assembler->addq(CpuRegister(RSP), Immediate(adjust)); in DecreaseFrameSizeImpl() 161 __ movl(Address(CpuRegister(RSP), offs), src.AsCpuRegister()); in Store() 164 __ movq(Address(CpuRegister(RSP), offs), src.AsCpuRegister()); in Store() 168 __ movq(Address(CpuRegister(RSP), offs), src.AsRegisterPairLow()); in Store() [all …]
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D | assembler_x86_64.h | 198 CHECK_EQ(base_in.AsRegister(), RSP); in Address() 199 Init(CpuRegister(RSP), disp.Int32Value()); in Address() 209 if (base_in.LowBits() == RSP) { in Init() 210 SetSIB(TIMES_1, CpuRegister(RSP), base_in); in Init() 214 if (base_in.LowBits() == RSP) { in Init() 215 SetSIB(TIMES_1, CpuRegister(RSP), base_in); in Init() 220 if (base_in.LowBits() == RSP) { in Init() 221 SetSIB(TIMES_1, CpuRegister(RSP), base_in); in Init() 229 CHECK_NE(index_in.AsRegister(), RSP); // Illegal addressing mode. in Address() 230 SetModRM(0, CpuRegister(RSP)); in Address() [all …]
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D | assembler_x86_64_test.cc | 179 x86_64::Address(x86_64::CpuRegister(x86_64::RSP), in SetUpHelpers() 182 x86_64::Address(x86_64::CpuRegister(x86_64::RSP), in SetUpHelpers() 185 x86_64::Address(x86_64::CpuRegister(x86_64::RSP), in SetUpHelpers() 188 x86_64::Address(x86_64::CpuRegister(x86_64::RSP), in SetUpHelpers() 190 addresses_.push_back(x86_64::Address(x86_64::CpuRegister(x86_64::RSP), -1)); in SetUpHelpers() 191 addresses_.push_back(x86_64::Address(x86_64::CpuRegister(x86_64::RSP), 0)); in SetUpHelpers() 192 addresses_.push_back(x86_64::Address(x86_64::CpuRegister(x86_64::RSP), 1)); in SetUpHelpers() 193 addresses_.push_back(x86_64::Address(x86_64::CpuRegister(x86_64::RSP), 987654321)); in SetUpHelpers() 207 registers_.push_back(new x86_64::CpuRegister(x86_64::RSP)); in SetUpHelpers() 224 secondary_register_names_.emplace(x86_64::CpuRegister(x86_64::RSP), "esp"); in SetUpHelpers() [all …]
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D | assembler_x86_64.cc | 42 if (addr.rm() != RSP || addr.cpu_index().AsRegister() == RSP) { in operator <<() 51 if (addr.rm() != RSP || addr.cpu_index().AsRegister() == RSP) { in operator <<() 57 if (addr.rm() != RSP || addr.cpu_index().AsRegister() == RSP) { in operator <<() 5089 movsd(dst, Address(CpuRegister(RSP), 0)); in LoadDoubleConstant() 5090 addq(CpuRegister(RSP), Immediate(2 * sizeof(intptr_t))); in LoadDoubleConstant()
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/art/runtime/arch/x86_64/ |
D | context_x86_64.cc | 31 gprs_[RSP] = &rsp_; in Reset() 34 rsp_ = X86_64Context::kBadGprBase + RSP; in Reset() 118 uintptr_t rsp = gprs[kNumberOfCpuRegisters - RSP - 1] - sizeof(intptr_t); in DoLongJump()
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D | registers_x86_64.h | 32 RSP = 4, enumerator
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D | context_x86_64.h | 41 SetGPR(RSP, new_sp); in SetSP()
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/art/compiler/optimizing/ |
D | code_generator_x86_64.cc | 518 DCHECK_NE(ref_reg, RSP); in EmitNativeCode() 609 DCHECK_NE(ref_reg, RSP); in EmitNativeCode() 1294 __ movq(Address(CpuRegister(RSP), stack_index), CpuRegister(reg_id)); in SaveCoreRegister() 1299 __ movq(CpuRegister(reg_id), Address(CpuRegister(RSP), stack_index)); in RestoreCoreRegister() 1305 __ movups(Address(CpuRegister(RSP), stack_index), XmmRegister(reg_id)); in SaveFloatingPointRegister() 1307 __ movsd(Address(CpuRegister(RSP), stack_index), XmmRegister(reg_id)); in SaveFloatingPointRegister() 1314 __ movups(XmmRegister(reg_id), Address(CpuRegister(RSP), stack_index)); in RestoreFloatingPointRegister() 1316 __ movsd(XmmRegister(reg_id), Address(CpuRegister(RSP), stack_index)); in RestoreFloatingPointRegister() 1387 blocked_core_registers_[RSP] = true; in SetupBlockedRegisters() 1408 __ movq(CpuRegister(method), Address(CpuRegister(RSP), kCurrentMethodStackOffset)); in MaybeIncrementHotness() [all …]
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D | intrinsics_x86_64.cc | 2302 __ popcntq(out, Address(CpuRegister(RSP), src.GetStackIndex())); in GenBitCount() 2305 __ popcntl(out, Address(CpuRegister(RSP), src.GetStackIndex())); in GenBitCount() 2381 __ bsrq(tmp, Address(CpuRegister(RSP), src.GetStackIndex())); in GenOneBit() 2384 __ bsrl(tmp, Address(CpuRegister(RSP), src.GetStackIndex())); in GenOneBit() 2409 __ movq(tmp, Address(CpuRegister(RSP), src.GetStackIndex())); in GenOneBit() 2412 __ movl(tmp, Address(CpuRegister(RSP), src.GetStackIndex())); in GenOneBit() 2496 __ bsrq(out, Address(CpuRegister(RSP), src.GetStackIndex())); in GenLeadingZeros() 2499 __ bsrl(out, Address(CpuRegister(RSP), src.GetStackIndex())); in GenLeadingZeros() 2569 __ bsfq(out, Address(CpuRegister(RSP), src.GetStackIndex())); in GenTrailingZeros() 2572 __ bsfl(out, Address(CpuRegister(RSP), src.GetStackIndex())); in GenTrailingZeros()
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D | code_generator_x86_64.h | 623 assembler_.lock()->addl(Address(CpuRegister(RSP), 0), Immediate(0));
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