/art/compiler/debug/dwarf/ |
D | dwarf_test.cc | 33 const bool is64bit = false; in TEST_F() local 122 WriteCIE(is64bit, Reg(is64bit ? 16 : 8), initial_opcodes, &debug_frame_data_); in TEST_F() 123 WriteFDE(is64bit, in TEST_F() 130 CheckObjdumpOutput(is64bit, "-debug-frame"); in TEST_F() 134 constexpr bool is64bit = true; in TEST_F() local 136 WriteCIE(is64bit, Reg(16), initial_opcodes, &debug_frame_data_); in TEST_F() 139 WriteFDE(is64bit, in TEST_F() 147 CheckObjdumpOutput(is64bit, "-debug-frame"); in TEST_F() 153 constexpr bool is64bit = true; in TEST_F() local 179 WriteCIE(is64bit, Reg(16), initial_opcodes, &debug_frame_data_); in TEST_F() [all …]
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D | dwarf_test.h | 113 std::vector<std::string> Objdump(bool is64bit, const char* args) { in Objdump() argument 114 if (is64bit) { in Objdump() 122 void CheckObjdumpOutput(bool is64bit, const char* args) { in CheckObjdumpOutput() argument 123 std::vector<std::string> actual_lines = Objdump(is64bit, args); in CheckObjdumpOutput()
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/art/compiler/debug/ |
D | elf_debug_frame_writer.h | 42 bool is64bit = Is64BitInstructionSet(isa); in WriteCIE() local 65 WriteCIE(is64bit, return_reg, opcodes, buffer); in WriteCIE() 88 WriteCIE(is64bit, return_reg, opcodes, buffer); in WriteCIE() 114 WriteCIE(is64bit, return_reg, opcodes, buffer); in WriteCIE() 140 WriteCIE(is64bit, return_reg, opcodes, buffer); in WriteCIE() 187 const bool is64bit = Is64BitInstructionSet(builder->GetIsa()); in WriteCFISection() local 201 dwarf::WriteFDE(is64bit, in WriteCFISection()
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D | elf_debug_loc_writer.h | 196 const bool is64bit = Is64BitInstructionSet(isa); in WriteDebugLocEntry() local 258 if (is64bit) { in WriteDebugLocEntry() 273 if (is64bit) { in WriteDebugLocEntry() 292 if (is64bit) { in WriteDebugLocEntry() 301 if (is64bit) { in WriteDebugLocEntry()
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D | elf_debug_line_writer.h | 53 const bool is64bit = Is64BitInstructionSet(isa); in WriteCompilationUnit() local 81 dwarf::DebugLineOpCodeWriter<> opcodes(is64bit, code_factor_bits_); in WriteCompilationUnit()
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D | elf_debug_info_writer.h | 113 const bool is64bit = Is64BitInstructionSet(owner_->builder_->GetIsa()); in Write() local 130 if (is64bit) { in Write() 138 if (is64bit) { in Write()
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/art/libelffile/dwarf/ |
D | headers.h | 41 void WriteCIE(bool is64bit, in WriteCIE() argument 57 if (is64bit) { in WriteCIE() 63 writer.Pad(is64bit ? 8 : 4); in WriteCIE() 69 void WriteFDE(bool is64bit, in WriteFDE() argument 80 if (is64bit) { in WriteFDE() 89 writer.Pad(is64bit ? 8 : 4); in WriteFDE()
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/art/compiler/ |
D | cfi_test.h | 49 constexpr bool is64bit = false; in GenerateExpected() local 51 dwarf::WriteCIE(is64bit, dwarf::Reg(8), initial_opcodes, &debug_frame_data_); in GenerateExpected() 53 dwarf::WriteFDE(is64bit, in GenerateExpected() 67 is64bit in GenerateExpected()
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/art/compiler/utils/x86_64/ |
D | assembler_x86_64.h | 395 void cmov(Condition c, CpuRegister dst, CpuRegister src, bool is64bit); 396 void cmov(Condition c, CpuRegister dst, const Address& src, bool is64bit); 438 void movd(XmmRegister dst, CpuRegister src, bool is64bit); 439 void movd(CpuRegister dst, XmmRegister src, bool is64bit); 545 void cvtsi2ss(XmmRegister dst, CpuRegister src, bool is64bit); 546 void cvtsi2ss(XmmRegister dst, const Address& src, bool is64bit); 548 void cvtsi2sd(XmmRegister dst, CpuRegister src, bool is64bit); 549 void cvtsi2sd(XmmRegister dst, const Address& src, bool is64bit); 560 void cvttss2si(CpuRegister dst, XmmRegister src, bool is64bit); 562 void cvttsd2si(CpuRegister dst, XmmRegister src, bool is64bit);
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D | assembler_x86_64.cc | 253 void X86_64Assembler::cmov(Condition c, CpuRegister dst, CpuRegister src, bool is64bit) { in cmov() argument 255 EmitOptionalRex(false, is64bit, dst.NeedsRex(), false, src.NeedsRex()); in cmov() 262 void X86_64Assembler::cmov(Condition c, CpuRegister dst, const Address& src, bool is64bit) { in cmov() argument 264 if (is64bit) { in cmov() 744 void X86_64Assembler::movd(XmmRegister dst, CpuRegister src, bool is64bit) { in movd() argument 747 EmitOptionalRex(false, is64bit, dst.NeedsRex(), false, src.NeedsRex()); in movd() 753 void X86_64Assembler::movd(CpuRegister dst, XmmRegister src, bool is64bit) { in movd() argument 756 EmitOptionalRex(false, is64bit, src.NeedsRex(), false, dst.NeedsRex()); in movd() 2294 void X86_64Assembler::cvtsi2ss(XmmRegister dst, CpuRegister src, bool is64bit) { in cvtsi2ss() argument 2297 if (is64bit) { in cvtsi2ss() [all …]
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/art/compiler/optimizing/ |
D | intrinsics_arm64.cc | 179 static void MoveFPToInt(LocationSummary* locations, bool is64bit, MacroAssembler* masm) { in MoveFPToInt() argument 182 __ Fmov(is64bit ? XRegisterFrom(output) : WRegisterFrom(output), in MoveFPToInt() 183 is64bit ? DRegisterFrom(input) : SRegisterFrom(input)); in MoveFPToInt() 186 static void MoveIntToFP(LocationSummary* locations, bool is64bit, MacroAssembler* masm) { in MoveIntToFP() argument 189 __ Fmov(is64bit ? DRegisterFrom(output) : SRegisterFrom(output), in MoveIntToFP() 190 is64bit ? XRegisterFrom(input) : WRegisterFrom(input)); in MoveIntToFP() 2754 bool is64bit, in GenIsInfinite() argument 2760 if (is64bit) { in GenIsInfinite() 2770 MoveFPToInt(locations, is64bit, masm); in GenIsInfinite()
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D | intrinsics_x86.cc | 168 static void CreateFPToIntLocations(ArenaAllocator* allocator, HInvoke* invoke, bool is64bit) { in CreateFPToIntLocations() argument 173 if (is64bit) { in CreateFPToIntLocations() 178 static void CreateIntToFPLocations(ArenaAllocator* allocator, HInvoke* invoke, bool is64bit) { in CreateIntToFPLocations() argument 183 if (is64bit) { in CreateIntToFPLocations() 189 static void MoveFPToInt(LocationSummary* locations, bool is64bit, X86Assembler* assembler) { in MoveFPToInt() argument 192 if (is64bit) { in MoveFPToInt() 204 static void MoveIntToFP(LocationSummary* locations, bool is64bit, X86Assembler* assembler) { in MoveIntToFP() argument 207 if (is64bit) { in MoveIntToFP()
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D | intrinsics_x86_64.cc | 140 static void MoveFPToInt(LocationSummary* locations, bool is64bit, X86_64Assembler* assembler) { in MoveFPToInt() argument 143 __ movd(output.AsRegister<CpuRegister>(), input.AsFpuRegister<XmmRegister>(), is64bit); in MoveFPToInt() 146 static void MoveIntToFP(LocationSummary* locations, bool is64bit, X86_64Assembler* assembler) { in MoveIntToFP() argument 149 __ movd(output.AsFpuRegister<XmmRegister>(), input.AsRegister<CpuRegister>(), is64bit); in MoveIntToFP()
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D | intrinsics_arm_vixl.cc | 223 static void MoveFPToInt(LocationSummary* locations, bool is64bit, ArmVIXLAssembler* assembler) { in MoveFPToInt() argument 226 if (is64bit) { in MoveFPToInt() 233 static void MoveIntToFP(LocationSummary* locations, bool is64bit, ArmVIXLAssembler* assembler) { in MoveIntToFP() argument 236 if (is64bit) { in MoveIntToFP()
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/art/runtime/interpreter/ |
D | unstarted_runtime.cc | 1674 jboolean is64bit = (pointer_size == PointerSize::k64) ? JNI_TRUE : JNI_FALSE; in UnstartedJNIVMRuntimeIs64Bit() local 1675 result->SetZ(is64bit); in UnstartedJNIVMRuntimeIs64Bit()
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