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Searched refs:op2_loc (Results 1 – 3 of 3) sorted by relevance

/art/compiler/optimizing/
Dcode_generator_arm_vixl.cc4690 Location op2_loc = locations->InAt(1); in GenerateMinMaxInt() local
4694 vixl32::Register op2 = RegisterFrom(op2_loc); in GenerateMinMaxInt()
4712 Location op2_loc = locations->InAt(1); in GenerateMinMaxLong() local
4716 if (op1_loc.Equals(op2_loc)) { in GenerateMinMaxLong()
4723 vixl32::Register op2_lo = LowRegisterFrom(op2_loc); in GenerateMinMaxLong()
4724 vixl32::Register op2_hi = HighRegisterFrom(op2_loc); in GenerateMinMaxLong()
4752 Location op2_loc = locations->InAt(1); in GenerateMinMaxFloat() local
4756 if (op1_loc.Equals(op2_loc)) { in GenerateMinMaxFloat()
4762 vixl32::SRegister op2 = SRegisterFrom(op2_loc); in GenerateMinMaxFloat()
4813 Location op2_loc = locations->InAt(1); in GenerateMinMaxDouble() local
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Dcode_generator_x86.cc4062 Location op2_loc = locations->InAt(1); in GenerateMinMaxInt() local
4065 if (op1_loc.Equals(op2_loc)) { in GenerateMinMaxInt()
4080 Register op2_lo = op2_loc.AsRegisterPairLow<Register>(); in GenerateMinMaxInt()
4081 Register op2_hi = op2_loc.AsRegisterPairHigh<Register>(); in GenerateMinMaxInt()
4100 Register op2 = op2_loc.AsRegister<Register>(); in GenerateMinMaxInt()
4118 Location op2_loc = locations->InAt(1); in GenerateMinMaxFP() local
4123 if (op1_loc.Equals(op2_loc)) { in GenerateMinMaxFP()
4145 XmmRegister op2 = op2_loc.AsFpuRegister<XmmRegister>(); in GenerateMinMaxFP()
Dcode_generator_x86_64.cc4198 Location op2_loc = locations->InAt(1); in GenerateMinMaxInt() local
4201 if (op1_loc.Equals(op2_loc)) { in GenerateMinMaxInt()
4210 CpuRegister op2 = op2_loc.AsRegister<CpuRegister>(); in GenerateMinMaxInt()
4232 Location op2_loc = locations->InAt(1); in GenerateMinMaxFP() local
4237 if (op1_loc.Equals(op2_loc)) { in GenerateMinMaxFP()
4259 XmmRegister op2 = op2_loc.AsFpuRegister<XmmRegister>(); in GenerateMinMaxFP()