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/art/compiler/utils/x86/
Dassembler_x86_test.cc41 class AssemblerX86Test : public AssemblerTest<x86::X86Assembler,
42 x86::Address,
43 x86::Register,
44 x86::XmmRegister,
45 x86::Immediate> {
47 using Base = AssemblerTest<x86::X86Assembler,
48 x86::Address,
49 x86::Register,
50 x86::XmmRegister,
51 x86::Immediate>;
[all …]
Dmanaged_register_x86.h24 namespace x86 {
217 constexpr inline x86::X86ManagedRegister ManagedRegister::AsX86() const { in AsX86()
218 x86::X86ManagedRegister reg(id_); in AsX86()
/art/runtime/arch/x86/
Dcallee_save_frame_x86.h29 namespace x86 {
32 (1 << art::x86::kNumberOfCpuRegisters); // Fake return address callee save.
34 (1 << art::x86::EBP) | (1 << art::x86::ESI) | (1 << art::x86::EDI);
36 (1 << art::x86::ECX) | (1 << art::x86::EDX) | (1 << art::x86::EBX);
38 (1 << art::x86::EAX) | (1 << art::x86::ECX) | (1 << art::x86::EDX) | (1 << art::x86::EBX);
41 (1 << art::x86::XMM0) | (1 << art::x86::XMM1) |
42 (1 << art::x86::XMM2) | (1 << art::x86::XMM3);
44 (1 << art::x86::XMM0) | (1 << art::x86::XMM1) |
45 (1 << art::x86::XMM2) | (1 << art::x86::XMM3) |
46 (1 << art::x86::XMM4) | (1 << art::x86::XMM5) |
[all …]
Dregisters_x86.cc22 namespace x86 { namespace
/art/build/
DAndroid.common.mk20 ART_TARGET_SUPPORTED_ARCH := arm arm64 x86 x86_64
21 ART_HOST_SUPPORTED_ARCH := x86 x86_64
26 ART_HOST_SUPPORTED_ARCH := x86 x86_64
30 ART_HOST_SUPPORTED_ARCH := x86
82 ART_HOST_ARCH := x86
91 2ND_ART_HOST_ARCH := x86
92 2ND_HOST_ARCH := x86
/art/tools/luci/config/
Dluci-scheduler.cfg40 triggers: "host-x86-cms"
41 triggers: "host-x86-debug"
42 triggers: "host-x86-gcstress-debug"
43 triggers: "host-x86-ndebug"
44 triggers: "host-x86-poison-debug"
77 triggers: "host-x86-cms"
78 triggers: "host-x86-debug"
79 triggers: "host-x86-gcstress-debug"
80 triggers: "host-x86-ndebug"
81 triggers: "host-x86-poison-debug"
[all …]
Dluci-milo.cfg77 name: "buildbucket/luci.art.ci/host-x86-cms"
78 category: "host|x86"
82 name: "buildbucket/luci.art.ci/host-x86-debug"
83 category: "host|x86"
87 name: "buildbucket/luci.art.ci/host-x86-ndebug"
88 category: "host|x86"
92 name: "buildbucket/luci.art.ci/host-x86-gcstress-debug"
93 category: "host|x86"
97 name: "buildbucket/luci.art.ci/host-x86-poison-debug"
98 category: "host|x86"
Dluci-notify.cfg71 name: "host-x86-cms"
75 name: "host-x86-debug"
79 name: "host-x86-gcstress-debug"
83 name: "host-x86-ndebug"
87 name: "host-x86-poison-debug"
Dcr-buildbucket.cfg92 name: "host-x86-cms"
95 name: "host-x86-debug"
98 name: "host-x86-gcstress-debug"
101 name: "host-x86-ndebug"
104 name: "host-x86-poison-debug"
/art/compiler/utils/
Dlabel.h32 namespace x86 {
110 friend class x86::X86Assembler;
111 friend class x86::NearLabel;
Dmanaged_register.h34 namespace x86 {
53 constexpr x86::X86ManagedRegister AsX86() const;
/art/disassembler/
Ddisassembler.cc58 return new x86::DisassemblerX86(options, /* supports_rex= */ false); in Create()
62 return new x86::DisassemblerX86(options, /* supports_rex= */ true); in Create()
/art/compiler/optimizing/
Dcodegen_test_utils.h146 class TestCodeGeneratorX86 : public x86::CodeGeneratorX86 {
149 : x86::CodeGeneratorX86(graph, compiler_options) { in TestCodeGeneratorX86()
151 AddAllocatedRegister(Location::RegisterLocation(x86::EDI)); in TestCodeGeneratorX86()
155 x86::CodeGeneratorX86::SetupBlockedRegisters(); in SetupBlockedRegisters()
157 blocked_core_registers_[x86::EBX] = true; in SetupBlockedRegisters()
160 blocked_core_registers_[x86::EDI] = false; in SetupBlockedRegisters()
Doptimization.cc107 return x86::PcRelativeFixups::kPcRelativeFixupsX86PassName; in OptimizationPassName()
109 return x86::InstructionSimplifierX86::kInstructionSimplifierX86PassName; in OptimizationPassName()
117 return x86::X86MemoryOperandGeneration::kX86MemoryOperandGenerationPassName; in OptimizationPassName()
290 opt = new (allocator) x86::PcRelativeFixups(graph, codegen, stats); in ConstructOptimizations()
294 opt = new (allocator) x86::X86MemoryOperandGeneration(graph, codegen, stats); in ConstructOptimizations()
297 opt = new (allocator) x86::InstructionSimplifierX86(graph, codegen, stats); in ConstructOptimizations()
Dx86_memory_gen.h26 namespace x86 {
/art/test/552-checker-x86-avx2-bit-manipulation/
Dinfo.txt1 Tests for generating bit manipulation instructions on x86
/art/compiler/
DAndroid.bp131 x86: {
133 "jni/quick/x86/calling_convention_x86.cc",
141 "utils/x86/assembler_x86.cc",
142 "utils/x86/jni_macro_assembler_x86.cc",
143 "utils/x86/managed_register_x86.cc",
433 x86: {
435 "utils/x86/managed_register_x86_test.cc",
438 // but happens to use x86 codegen as part of the test.
444 // Is this test a bit-rotten copy of the x86 test? b/77951326
486 x86: {
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/art/test/609-checker-x86-bounds-check/
Dinfo.txt1 Checker test that we combine ArrayLength and BoundsCheck on x86/x86_64.
/art/test/413-regalloc-regression/
Dinfo.txt2 fail compiling removeElementAt in x86.
/art/test/528-long-hint/
Dinfo.txt1 Regression test for optimizing that used to crash on x86 when
/art/test/467-regalloc-pair/
Dinfo.txt2 that used to trip when compiling TestCase.testCase on x86.
/art/test/456-baseline-array-set/
Dinfo.txt1 Test for optimizing on x86, where we could run out
/art/test/458-long-to-fpu/
Dinfo.txt1 Regression test for x86's code generator, which had a bug in
/art/test/574-irreducible-and-constant-area/
Dinfo.txt1 Regression test for intrinsics on x86, which used to wrongly assume
/art/test/660-store-8-16/
Dinfo.txt1 Regression test for the compiler whose x86 and x64 backends

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