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Searched refs:CACHE_LINE_SIZE (Results 1 – 3 of 3) sorted by relevance

/bionic/libc/arch-arm/cortex-a15/bionic/
Dmemmove.S36 #define CACHE_LINE_SIZE (64) macro
39 #define PREFETCH_DISTANCE_NEAR (CACHE_LINE_SIZE*4)
40 #define PREFETCH_DISTANCE_MID (CACHE_LINE_SIZE*4)
41 #define PREFETCH_DISTANCE_FAR (CACHE_LINE_SIZE*16)
65 pld [r1, #-CACHE_LINE_SIZE]
66 pld [r1, #-CACHE_LINE_SIZE*2]
117 pld [r1, #-CACHE_LINE_SIZE*3]
118 pld [r1, #-CACHE_LINE_SIZE*4]
139 pld [r1, #-(PREFETCH_DISTANCE_NEAR+CACHE_LINE_SIZE*2)+32]
147 pld [r1, #-(PREFETCH_DISTANCE_NEAR+CACHE_LINE_SIZE*2)+32]
[all …]
/bionic/libc/arch-arm/generic/bionic/
Dmemcmp.S33 #define CACHE_LINE_SIZE 32 macro
35 #define CACHE_LINE_SIZE 64 macro
45 pld [r0, #(CACHE_LINE_SIZE * 0)]
46 pld [r0, #(CACHE_LINE_SIZE * 1)]
53 pld [r1, #(CACHE_LINE_SIZE * 0)]
54 pld [r1, #(CACHE_LINE_SIZE * 1)]
70 pld [r0, #(CACHE_LINE_SIZE * 2)]
71 pld [r1, #(CACHE_LINE_SIZE * 2)]
75 pld [r0, #(CACHE_LINE_SIZE * 2)]
77 pld [r1, #(CACHE_LINE_SIZE * 2)]
[all …]
/bionic/libc/arch-arm/cortex-a55/bionic/
Dmemcpy_base.S30 #define CACHE_LINE_SIZE (64) macro
31 #define PREFETCH_DISTANCE (CACHE_LINE_SIZE*6)
44 pld [r1, #CACHE_LINE_SIZE*1]
54 pld [r1, #CACHE_LINE_SIZE*2]
57 pld [r1, #CACHE_LINE_SIZE*3]