1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef IB_USER_IOCTL_VERBS_H 20 #define IB_USER_IOCTL_VERBS_H 21 #include <linux/types.h> 22 #include <rdma/ib_user_verbs.h> 23 #ifndef RDMA_UAPI_PTR 24 #define RDMA_UAPI_PTR(_type,_name) __aligned_u64 _name 25 #endif 26 #define IB_UVERBS_ACCESS_OPTIONAL_FIRST (1 << 20) 27 #define IB_UVERBS_ACCESS_OPTIONAL_LAST (1 << 29) 28 enum ib_uverbs_core_support { 29 IB_UVERBS_CORE_SUPPORT_OPTIONAL_MR_ACCESS = 1 << 0, 30 }; 31 enum ib_uverbs_access_flags { 32 IB_UVERBS_ACCESS_LOCAL_WRITE = 1 << 0, 33 IB_UVERBS_ACCESS_REMOTE_WRITE = 1 << 1, 34 IB_UVERBS_ACCESS_REMOTE_READ = 1 << 2, 35 IB_UVERBS_ACCESS_REMOTE_ATOMIC = 1 << 3, 36 IB_UVERBS_ACCESS_MW_BIND = 1 << 4, 37 IB_UVERBS_ACCESS_ZERO_BASED = 1 << 5, 38 IB_UVERBS_ACCESS_ON_DEMAND = 1 << 6, 39 IB_UVERBS_ACCESS_HUGETLB = 1 << 7, 40 IB_UVERBS_ACCESS_RELAXED_ORDERING = IB_UVERBS_ACCESS_OPTIONAL_FIRST, 41 IB_UVERBS_ACCESS_OPTIONAL_RANGE = ((IB_UVERBS_ACCESS_OPTIONAL_LAST << 1) - 1) & ~(IB_UVERBS_ACCESS_OPTIONAL_FIRST - 1) 42 }; 43 enum ib_uverbs_query_port_cap_flags { 44 IB_UVERBS_PCF_SM = 1 << 1, 45 IB_UVERBS_PCF_NOTICE_SUP = 1 << 2, 46 IB_UVERBS_PCF_TRAP_SUP = 1 << 3, 47 IB_UVERBS_PCF_OPT_IPD_SUP = 1 << 4, 48 IB_UVERBS_PCF_AUTO_MIGR_SUP = 1 << 5, 49 IB_UVERBS_PCF_SL_MAP_SUP = 1 << 6, 50 IB_UVERBS_PCF_MKEY_NVRAM = 1 << 7, 51 IB_UVERBS_PCF_PKEY_NVRAM = 1 << 8, 52 IB_UVERBS_PCF_LED_INFO_SUP = 1 << 9, 53 IB_UVERBS_PCF_SM_DISABLED = 1 << 10, 54 IB_UVERBS_PCF_SYS_IMAGE_GUID_SUP = 1 << 11, 55 IB_UVERBS_PCF_PKEY_SW_EXT_PORT_TRAP_SUP = 1 << 12, 56 IB_UVERBS_PCF_EXTENDED_SPEEDS_SUP = 1 << 14, 57 IB_UVERBS_PCF_CM_SUP = 1 << 16, 58 IB_UVERBS_PCF_SNMP_TUNNEL_SUP = 1 << 17, 59 IB_UVERBS_PCF_REINIT_SUP = 1 << 18, 60 IB_UVERBS_PCF_DEVICE_MGMT_SUP = 1 << 19, 61 IB_UVERBS_PCF_VENDOR_CLASS_SUP = 1 << 20, 62 IB_UVERBS_PCF_DR_NOTICE_SUP = 1 << 21, 63 IB_UVERBS_PCF_CAP_MASK_NOTICE_SUP = 1 << 22, 64 IB_UVERBS_PCF_BOOT_MGMT_SUP = 1 << 23, 65 IB_UVERBS_PCF_LINK_LATENCY_SUP = 1 << 24, 66 IB_UVERBS_PCF_CLIENT_REG_SUP = 1 << 25, 67 IB_UVERBS_PCF_LINK_SPEED_WIDTH_TABLE_SUP = 1 << 27, 68 IB_UVERBS_PCF_VENDOR_SPECIFIC_MADS_TABLE_SUP = 1 << 28, 69 IB_UVERBS_PCF_MCAST_PKEY_TRAP_SUPPRESSION_SUP = 1 << 29, 70 IB_UVERBS_PCF_MCAST_FDB_TOP_SUP = 1 << 30, 71 IB_UVERBS_PCF_HIERARCHY_INFO_SUP = 1ULL << 31, 72 IB_UVERBS_PCF_IP_BASED_GIDS = 1 << 26, 73 }; 74 enum ib_uverbs_query_port_flags { 75 IB_UVERBS_QPF_GRH_REQUIRED = 1 << 0, 76 }; 77 enum ib_uverbs_flow_action_esp_keymat { 78 IB_UVERBS_FLOW_ACTION_ESP_KEYMAT_AES_GCM, 79 }; 80 enum ib_uverbs_flow_action_esp_keymat_aes_gcm_iv_algo { 81 IB_UVERBS_FLOW_ACTION_IV_ALGO_SEQ, 82 }; 83 struct ib_uverbs_flow_action_esp_keymat_aes_gcm { 84 __aligned_u64 iv; 85 __u32 iv_algo; 86 __u32 salt; 87 __u32 icv_len; 88 __u32 key_len; 89 __u32 aes_key[256 / 32]; 90 }; 91 enum ib_uverbs_flow_action_esp_replay { 92 IB_UVERBS_FLOW_ACTION_ESP_REPLAY_NONE, 93 IB_UVERBS_FLOW_ACTION_ESP_REPLAY_BMP, 94 }; 95 struct ib_uverbs_flow_action_esp_replay_bmp { 96 __u32 size; 97 }; 98 enum ib_uverbs_flow_action_esp_flags { 99 IB_UVERBS_FLOW_ACTION_ESP_FLAGS_INLINE_CRYPTO = 0UL << 0, 100 IB_UVERBS_FLOW_ACTION_ESP_FLAGS_FULL_OFFLOAD = 1UL << 0, 101 IB_UVERBS_FLOW_ACTION_ESP_FLAGS_TUNNEL = 0UL << 1, 102 IB_UVERBS_FLOW_ACTION_ESP_FLAGS_TRANSPORT = 1UL << 1, 103 IB_UVERBS_FLOW_ACTION_ESP_FLAGS_DECRYPT = 0UL << 2, 104 IB_UVERBS_FLOW_ACTION_ESP_FLAGS_ENCRYPT = 1UL << 2, 105 IB_UVERBS_FLOW_ACTION_ESP_FLAGS_ESN_NEW_WINDOW = 1UL << 3, 106 }; 107 struct ib_uverbs_flow_action_esp_encap { 108 RDMA_UAPI_PTR(void *, val_ptr); 109 RDMA_UAPI_PTR(struct ib_uverbs_flow_action_esp_encap *, next_ptr); 110 __u16 len; 111 __u16 type; 112 }; 113 struct ib_uverbs_flow_action_esp { 114 __u32 spi; 115 __u32 seq; 116 __u32 tfc_pad; 117 __u32 flags; 118 __aligned_u64 hard_limit_pkts; 119 }; 120 enum ib_uverbs_read_counters_flags { 121 IB_UVERBS_READ_COUNTERS_PREFER_CACHED = 1 << 0, 122 }; 123 enum ib_uverbs_advise_mr_advice { 124 IB_UVERBS_ADVISE_MR_ADVICE_PREFETCH, 125 IB_UVERBS_ADVISE_MR_ADVICE_PREFETCH_WRITE, 126 }; 127 enum ib_uverbs_advise_mr_flag { 128 IB_UVERBS_ADVISE_MR_FLAG_FLUSH = 1 << 0, 129 }; 130 struct ib_uverbs_query_port_resp_ex { 131 struct ib_uverbs_query_port_resp legacy_resp; 132 __u16 port_cap_flags2; 133 __u8 reserved[6]; 134 }; 135 enum rdma_driver_id { 136 RDMA_DRIVER_UNKNOWN, 137 RDMA_DRIVER_MLX5, 138 RDMA_DRIVER_MLX4, 139 RDMA_DRIVER_CXGB3, 140 RDMA_DRIVER_CXGB4, 141 RDMA_DRIVER_MTHCA, 142 RDMA_DRIVER_BNXT_RE, 143 RDMA_DRIVER_OCRDMA, 144 RDMA_DRIVER_NES, 145 RDMA_DRIVER_I40IW, 146 RDMA_DRIVER_VMW_PVRDMA, 147 RDMA_DRIVER_QEDR, 148 RDMA_DRIVER_HNS, 149 RDMA_DRIVER_USNIC, 150 RDMA_DRIVER_RXE, 151 RDMA_DRIVER_HFI1, 152 RDMA_DRIVER_QIB, 153 RDMA_DRIVER_EFA, 154 RDMA_DRIVER_SIW, 155 }; 156 #endif 157