1 /****************************************************************************
2  ****************************************************************************
3  ***
4  ***   This header was automatically generated from a Linux kernel header
5  ***   of the same name, to make information necessary for userspace to
6  ***   call into the kernel available to libc.  It contains only constants,
7  ***   structures, and macros generated from the original header, and thus,
8  ***   contains no copyrightable information.
9  ***
10  ***   To edit the content of this header, modify the corresponding
11  ***   source file (e.g. under external/kernel-headers/original/) then
12  ***   run bionic/libc/kernel/tools/update_all.py
13  ***
14  ***   Any manual change here will be lost the next time this script will
15  ***   be run. You've been warned!
16  ***
17  ****************************************************************************
18  ****************************************************************************/
19 #ifndef OMAP3_ISP_USER_H
20 #define OMAP3_ISP_USER_H
21 #include <linux/types.h>
22 #include <linux/videodev2.h>
23 #define VIDIOC_OMAP3ISP_CCDC_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct omap3isp_ccdc_update_config)
24 #define VIDIOC_OMAP3ISP_PRV_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct omap3isp_prev_update_config)
25 #define VIDIOC_OMAP3ISP_AEWB_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 3, struct omap3isp_h3a_aewb_config)
26 #define VIDIOC_OMAP3ISP_HIST_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct omap3isp_hist_config)
27 #define VIDIOC_OMAP3ISP_AF_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct omap3isp_h3a_af_config)
28 #define VIDIOC_OMAP3ISP_STAT_REQ _IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct omap3isp_stat_data)
29 #define VIDIOC_OMAP3ISP_STAT_REQ_TIME32 _IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct omap3isp_stat_data_time32)
30 #define VIDIOC_OMAP3ISP_STAT_EN _IOWR('V', BASE_VIDIOC_PRIVATE + 7, unsigned long)
31 #define V4L2_EVENT_OMAP3ISP_CLASS (V4L2_EVENT_PRIVATE_START | 0x100)
32 #define V4L2_EVENT_OMAP3ISP_AEWB (V4L2_EVENT_OMAP3ISP_CLASS | 0x1)
33 #define V4L2_EVENT_OMAP3ISP_AF (V4L2_EVENT_OMAP3ISP_CLASS | 0x2)
34 #define V4L2_EVENT_OMAP3ISP_HIST (V4L2_EVENT_OMAP3ISP_CLASS | 0x3)
35 struct omap3isp_stat_event_status {
36   __u32 frame_number;
37   __u16 config_counter;
38   __u8 buf_err;
39 };
40 #define OMAP3ISP_AEWB_MAX_SATURATION_LIM 1023
41 #define OMAP3ISP_AEWB_MIN_WIN_H 2
42 #define OMAP3ISP_AEWB_MAX_WIN_H 256
43 #define OMAP3ISP_AEWB_MIN_WIN_W 6
44 #define OMAP3ISP_AEWB_MAX_WIN_W 256
45 #define OMAP3ISP_AEWB_MIN_WINVC 1
46 #define OMAP3ISP_AEWB_MIN_WINHC 1
47 #define OMAP3ISP_AEWB_MAX_WINVC 128
48 #define OMAP3ISP_AEWB_MAX_WINHC 36
49 #define OMAP3ISP_AEWB_MAX_WINSTART 4095
50 #define OMAP3ISP_AEWB_MIN_SUB_INC 2
51 #define OMAP3ISP_AEWB_MAX_SUB_INC 32
52 #define OMAP3ISP_AEWB_MAX_BUF_SIZE 83600
53 #define OMAP3ISP_AF_IIRSH_MIN 0
54 #define OMAP3ISP_AF_IIRSH_MAX 4095
55 #define OMAP3ISP_AF_PAXEL_HORIZONTAL_COUNT_MIN 1
56 #define OMAP3ISP_AF_PAXEL_HORIZONTAL_COUNT_MAX 36
57 #define OMAP3ISP_AF_PAXEL_VERTICAL_COUNT_MIN 1
58 #define OMAP3ISP_AF_PAXEL_VERTICAL_COUNT_MAX 128
59 #define OMAP3ISP_AF_PAXEL_INCREMENT_MIN 2
60 #define OMAP3ISP_AF_PAXEL_INCREMENT_MAX 32
61 #define OMAP3ISP_AF_PAXEL_HEIGHT_MIN 2
62 #define OMAP3ISP_AF_PAXEL_HEIGHT_MAX 256
63 #define OMAP3ISP_AF_PAXEL_WIDTH_MIN 16
64 #define OMAP3ISP_AF_PAXEL_WIDTH_MAX 256
65 #define OMAP3ISP_AF_PAXEL_HZSTART_MIN 1
66 #define OMAP3ISP_AF_PAXEL_HZSTART_MAX 4095
67 #define OMAP3ISP_AF_PAXEL_VTSTART_MIN 0
68 #define OMAP3ISP_AF_PAXEL_VTSTART_MAX 4095
69 #define OMAP3ISP_AF_THRESHOLD_MAX 255
70 #define OMAP3ISP_AF_COEF_MAX 4095
71 #define OMAP3ISP_AF_PAXEL_SIZE 48
72 #define OMAP3ISP_AF_MAX_BUF_SIZE 221184
73 struct omap3isp_h3a_aewb_config {
74   __u32 buf_size;
75   __u16 config_counter;
76   __u16 saturation_limit;
77   __u16 win_height;
78   __u16 win_width;
79   __u16 ver_win_count;
80   __u16 hor_win_count;
81   __u16 ver_win_start;
82   __u16 hor_win_start;
83   __u16 blk_ver_win_start;
84   __u16 blk_win_height;
85   __u16 subsample_ver_inc;
86   __u16 subsample_hor_inc;
87   __u8 alaw_enable;
88 };
89 struct omap3isp_stat_data {
90   struct timeval ts;
91   void __user * buf;
92   __u32 buf_size;
93   __u16 frame_number;
94   __u16 cur_frame;
95   __u16 config_counter;
96 };
97 #define OMAP3ISP_HIST_BINS_32 0
98 #define OMAP3ISP_HIST_BINS_64 1
99 #define OMAP3ISP_HIST_BINS_128 2
100 #define OMAP3ISP_HIST_BINS_256 3
101 #define OMAP3ISP_HIST_MEM_SIZE_BINS(n) ((1 << ((n) + 5)) * 4 * 4)
102 #define OMAP3ISP_HIST_MEM_SIZE 1024
103 #define OMAP3ISP_HIST_MIN_REGIONS 1
104 #define OMAP3ISP_HIST_MAX_REGIONS 4
105 #define OMAP3ISP_HIST_MAX_WB_GAIN 255
106 #define OMAP3ISP_HIST_MIN_WB_GAIN 0
107 #define OMAP3ISP_HIST_MAX_BIT_WIDTH 14
108 #define OMAP3ISP_HIST_MIN_BIT_WIDTH 8
109 #define OMAP3ISP_HIST_MAX_WG 4
110 #define OMAP3ISP_HIST_MAX_BUF_SIZE 4096
111 #define OMAP3ISP_HIST_SOURCE_CCDC 0
112 #define OMAP3ISP_HIST_SOURCE_MEM 1
113 #define OMAP3ISP_HIST_CFA_BAYER 0
114 #define OMAP3ISP_HIST_CFA_FOVEONX3 1
115 struct omap3isp_hist_region {
116   __u16 h_start;
117   __u16 h_end;
118   __u16 v_start;
119   __u16 v_end;
120 };
121 struct omap3isp_hist_config {
122   __u32 buf_size;
123   __u16 config_counter;
124   __u8 num_acc_frames;
125   __u16 hist_bins;
126   __u8 cfa;
127   __u8 wg[OMAP3ISP_HIST_MAX_WG];
128   __u8 num_regions;
129   struct omap3isp_hist_region region[OMAP3ISP_HIST_MAX_REGIONS];
130 };
131 #define OMAP3ISP_AF_NUM_COEF 11
132 enum omap3isp_h3a_af_fvmode {
133   OMAP3ISP_AF_MODE_SUMMED = 0,
134   OMAP3ISP_AF_MODE_PEAK = 1
135 };
136 enum omap3isp_h3a_af_rgbpos {
137   OMAP3ISP_AF_GR_GB_BAYER = 0,
138   OMAP3ISP_AF_RG_GB_BAYER = 1,
139   OMAP3ISP_AF_GR_BG_BAYER = 2,
140   OMAP3ISP_AF_RG_BG_BAYER = 3,
141   OMAP3ISP_AF_GG_RB_CUSTOM = 4,
142   OMAP3ISP_AF_RB_GG_CUSTOM = 5
143 };
144 struct omap3isp_h3a_af_hmf {
145   __u8 enable;
146   __u8 threshold;
147 };
148 struct omap3isp_h3a_af_iir {
149   __u16 h_start;
150   __u16 coeff_set0[OMAP3ISP_AF_NUM_COEF];
151   __u16 coeff_set1[OMAP3ISP_AF_NUM_COEF];
152 };
153 struct omap3isp_h3a_af_paxel {
154   __u16 h_start;
155   __u16 v_start;
156   __u8 width;
157   __u8 height;
158   __u8 h_cnt;
159   __u8 v_cnt;
160   __u8 line_inc;
161 };
162 struct omap3isp_h3a_af_config {
163   __u32 buf_size;
164   __u16 config_counter;
165   struct omap3isp_h3a_af_hmf hmf;
166   struct omap3isp_h3a_af_iir iir;
167   struct omap3isp_h3a_af_paxel paxel;
168   enum omap3isp_h3a_af_rgbpos rgb_pos;
169   enum omap3isp_h3a_af_fvmode fvmode;
170   __u8 alaw_enable;
171 };
172 #define OMAP3ISP_CCDC_ALAW (1 << 0)
173 #define OMAP3ISP_CCDC_LPF (1 << 1)
174 #define OMAP3ISP_CCDC_BLCLAMP (1 << 2)
175 #define OMAP3ISP_CCDC_BCOMP (1 << 3)
176 #define OMAP3ISP_CCDC_FPC (1 << 4)
177 #define OMAP3ISP_CCDC_CULL (1 << 5)
178 #define OMAP3ISP_CCDC_CONFIG_LSC (1 << 7)
179 #define OMAP3ISP_CCDC_TBL_LSC (1 << 8)
180 #define OMAP3ISP_RGB_MAX 3
181 enum omap3isp_alaw_ipwidth {
182   OMAP3ISP_ALAW_BIT12_3 = 0x3,
183   OMAP3ISP_ALAW_BIT11_2 = 0x4,
184   OMAP3ISP_ALAW_BIT10_1 = 0x5,
185   OMAP3ISP_ALAW_BIT9_0 = 0x6
186 };
187 struct omap3isp_ccdc_lsc_config {
188   __u16 offset;
189   __u8 gain_mode_n;
190   __u8 gain_mode_m;
191   __u8 gain_format;
192   __u16 fmtsph;
193   __u16 fmtlnh;
194   __u16 fmtslv;
195   __u16 fmtlnv;
196   __u8 initial_x;
197   __u8 initial_y;
198   __u32 size;
199 };
200 struct omap3isp_ccdc_bclamp {
201   __u8 obgain;
202   __u8 obstpixel;
203   __u8 oblines;
204   __u8 oblen;
205   __u16 dcsubval;
206 };
207 struct omap3isp_ccdc_fpc {
208   __u16 fpnum;
209   __u32 fpcaddr;
210 };
211 struct omap3isp_ccdc_blcomp {
212   __u8 b_mg;
213   __u8 gb_g;
214   __u8 gr_cy;
215   __u8 r_ye;
216 };
217 struct omap3isp_ccdc_culling {
218   __u8 v_pattern;
219   __u16 h_odd;
220   __u16 h_even;
221 };
222 struct omap3isp_ccdc_update_config {
223   __u16 update;
224   __u16 flag;
225   enum omap3isp_alaw_ipwidth alawip;
226   struct omap3isp_ccdc_bclamp __user * bclamp;
227   struct omap3isp_ccdc_blcomp __user * blcomp;
228   struct omap3isp_ccdc_fpc __user * fpc;
229   struct omap3isp_ccdc_lsc_config __user * lsc_cfg;
230   struct omap3isp_ccdc_culling __user * cull;
231   __u8 __user * lsc;
232 };
233 #define OMAP3ISP_PREV_LUMAENH (1 << 0)
234 #define OMAP3ISP_PREV_INVALAW (1 << 1)
235 #define OMAP3ISP_PREV_HRZ_MED (1 << 2)
236 #define OMAP3ISP_PREV_CFA (1 << 3)
237 #define OMAP3ISP_PREV_CHROMA_SUPP (1 << 4)
238 #define OMAP3ISP_PREV_WB (1 << 5)
239 #define OMAP3ISP_PREV_BLKADJ (1 << 6)
240 #define OMAP3ISP_PREV_RGB2RGB (1 << 7)
241 #define OMAP3ISP_PREV_COLOR_CONV (1 << 8)
242 #define OMAP3ISP_PREV_YC_LIMIT (1 << 9)
243 #define OMAP3ISP_PREV_DEFECT_COR (1 << 10)
244 #define OMAP3ISP_PREV_DRK_FRM_CAPTURE (1 << 12)
245 #define OMAP3ISP_PREV_DRK_FRM_SUBTRACT (1 << 13)
246 #define OMAP3ISP_PREV_LENS_SHADING (1 << 14)
247 #define OMAP3ISP_PREV_NF (1 << 15)
248 #define OMAP3ISP_PREV_GAMMA (1 << 16)
249 #define OMAP3ISP_PREV_NF_TBL_SIZE 64
250 #define OMAP3ISP_PREV_CFA_TBL_SIZE 576
251 #define OMAP3ISP_PREV_CFA_BLK_SIZE (OMAP3ISP_PREV_CFA_TBL_SIZE / 4)
252 #define OMAP3ISP_PREV_GAMMA_TBL_SIZE 1024
253 #define OMAP3ISP_PREV_YENH_TBL_SIZE 128
254 #define OMAP3ISP_PREV_DETECT_CORRECT_CHANNELS 4
255 struct omap3isp_prev_hmed {
256   __u8 odddist;
257   __u8 evendist;
258   __u8 thres;
259 };
260 enum omap3isp_cfa_fmt {
261   OMAP3ISP_CFAFMT_BAYER,
262   OMAP3ISP_CFAFMT_SONYVGA,
263   OMAP3ISP_CFAFMT_RGBFOVEON,
264   OMAP3ISP_CFAFMT_DNSPL,
265   OMAP3ISP_CFAFMT_HONEYCOMB,
266   OMAP3ISP_CFAFMT_RRGGBBFOVEON
267 };
268 struct omap3isp_prev_cfa {
269   enum omap3isp_cfa_fmt format;
270   __u8 gradthrs_vert;
271   __u8 gradthrs_horz;
272   __u32 table[4][OMAP3ISP_PREV_CFA_BLK_SIZE];
273 };
274 struct omap3isp_prev_csup {
275   __u8 gain;
276   __u8 thres;
277   __u8 hypf_en;
278 };
279 struct omap3isp_prev_wbal {
280   __u16 dgain;
281   __u8 coef3;
282   __u8 coef2;
283   __u8 coef1;
284   __u8 coef0;
285 };
286 struct omap3isp_prev_blkadj {
287   __u8 red;
288   __u8 green;
289   __u8 blue;
290 };
291 struct omap3isp_prev_rgbtorgb {
292   __u16 matrix[OMAP3ISP_RGB_MAX][OMAP3ISP_RGB_MAX];
293   __u16 offset[OMAP3ISP_RGB_MAX];
294 };
295 struct omap3isp_prev_csc {
296   __u16 matrix[OMAP3ISP_RGB_MAX][OMAP3ISP_RGB_MAX];
297   __s16 offset[OMAP3ISP_RGB_MAX];
298 };
299 struct omap3isp_prev_yclimit {
300   __u8 minC;
301   __u8 maxC;
302   __u8 minY;
303   __u8 maxY;
304 };
305 struct omap3isp_prev_dcor {
306   __u8 couplet_mode_en;
307   __u32 detect_correct[OMAP3ISP_PREV_DETECT_CORRECT_CHANNELS];
308 };
309 struct omap3isp_prev_nf {
310   __u8 spread;
311   __u32 table[OMAP3ISP_PREV_NF_TBL_SIZE];
312 };
313 struct omap3isp_prev_gtables {
314   __u32 red[OMAP3ISP_PREV_GAMMA_TBL_SIZE];
315   __u32 green[OMAP3ISP_PREV_GAMMA_TBL_SIZE];
316   __u32 blue[OMAP3ISP_PREV_GAMMA_TBL_SIZE];
317 };
318 struct omap3isp_prev_luma {
319   __u32 table[OMAP3ISP_PREV_YENH_TBL_SIZE];
320 };
321 struct omap3isp_prev_update_config {
322   __u32 update;
323   __u32 flag;
324   __u32 shading_shift;
325   struct omap3isp_prev_luma __user * luma;
326   struct omap3isp_prev_hmed __user * hmed;
327   struct omap3isp_prev_cfa __user * cfa;
328   struct omap3isp_prev_csup __user * csup;
329   struct omap3isp_prev_wbal __user * wbal;
330   struct omap3isp_prev_blkadj __user * blkadj;
331   struct omap3isp_prev_rgbtorgb __user * rgb2rgb;
332   struct omap3isp_prev_csc __user * csc;
333   struct omap3isp_prev_yclimit __user * yclimit;
334   struct omap3isp_prev_dcor __user * dcor;
335   struct omap3isp_prev_nf __user * nf;
336   struct omap3isp_prev_gtables __user * gamma;
337 };
338 #endif
339