1 /****************************************************************************
2  ****************************************************************************
3  ***
4  ***   This header was automatically generated from a Linux kernel header
5  ***   of the same name, to make information necessary for userspace to
6  ***   call into the kernel available to libc.  It contains only constants,
7  ***   structures, and macros generated from the original header, and thus,
8  ***   contains no copyrightable information.
9  ***
10  ***   To edit the content of this header, modify the corresponding
11  ***   source file (e.g. under external/kernel-headers/original/) then
12  ***   run bionic/libc/kernel/tools/update_all.py
13  ***
14  ***   Any manual change here will be lost the next time this script will
15  ***   be run. You've been warned!
16  ***
17  ****************************************************************************
18  ****************************************************************************/
19 #ifndef _DRM_MODE_H
20 #define _DRM_MODE_H
21 #include "drm.h"
22 #ifdef __cplusplus
23 extern "C" {
24 #endif
25 #define DRM_CONNECTOR_NAME_LEN 32
26 #define DRM_DISPLAY_MODE_LEN 32
27 #define DRM_PROP_NAME_LEN 32
28 #define DRM_MODE_TYPE_BUILTIN (1 << 0)
29 #define DRM_MODE_TYPE_CLOCK_C ((1 << 1) | DRM_MODE_TYPE_BUILTIN)
30 #define DRM_MODE_TYPE_CRTC_C ((1 << 2) | DRM_MODE_TYPE_BUILTIN)
31 #define DRM_MODE_TYPE_PREFERRED (1 << 3)
32 #define DRM_MODE_TYPE_DEFAULT (1 << 4)
33 #define DRM_MODE_TYPE_USERDEF (1 << 5)
34 #define DRM_MODE_TYPE_DRIVER (1 << 6)
35 #define DRM_MODE_TYPE_ALL (DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_USERDEF | DRM_MODE_TYPE_DRIVER)
36 #define DRM_MODE_FLAG_PHSYNC (1 << 0)
37 #define DRM_MODE_FLAG_NHSYNC (1 << 1)
38 #define DRM_MODE_FLAG_PVSYNC (1 << 2)
39 #define DRM_MODE_FLAG_NVSYNC (1 << 3)
40 #define DRM_MODE_FLAG_INTERLACE (1 << 4)
41 #define DRM_MODE_FLAG_DBLSCAN (1 << 5)
42 #define DRM_MODE_FLAG_CSYNC (1 << 6)
43 #define DRM_MODE_FLAG_PCSYNC (1 << 7)
44 #define DRM_MODE_FLAG_NCSYNC (1 << 8)
45 #define DRM_MODE_FLAG_HSKEW (1 << 9)
46 #define DRM_MODE_FLAG_BCAST (1 << 10)
47 #define DRM_MODE_FLAG_PIXMUX (1 << 11)
48 #define DRM_MODE_FLAG_DBLCLK (1 << 12)
49 #define DRM_MODE_FLAG_CLKDIV2 (1 << 13)
50 #define DRM_MODE_FLAG_3D_MASK (0x1f << 14)
51 #define DRM_MODE_FLAG_3D_NONE (0 << 14)
52 #define DRM_MODE_FLAG_3D_FRAME_PACKING (1 << 14)
53 #define DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE (2 << 14)
54 #define DRM_MODE_FLAG_3D_LINE_ALTERNATIVE (3 << 14)
55 #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL (4 << 14)
56 #define DRM_MODE_FLAG_3D_L_DEPTH (5 << 14)
57 #define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH (6 << 14)
58 #define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (7 << 14)
59 #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF (8 << 14)
60 #define DRM_MODE_PICTURE_ASPECT_NONE 0
61 #define DRM_MODE_PICTURE_ASPECT_4_3 1
62 #define DRM_MODE_PICTURE_ASPECT_16_9 2
63 #define DRM_MODE_PICTURE_ASPECT_64_27 3
64 #define DRM_MODE_PICTURE_ASPECT_256_135 4
65 #define DRM_MODE_CONTENT_TYPE_NO_DATA 0
66 #define DRM_MODE_CONTENT_TYPE_GRAPHICS 1
67 #define DRM_MODE_CONTENT_TYPE_PHOTO 2
68 #define DRM_MODE_CONTENT_TYPE_CINEMA 3
69 #define DRM_MODE_CONTENT_TYPE_GAME 4
70 #define DRM_MODE_FLAG_PIC_AR_MASK (0x0F << 19)
71 #define DRM_MODE_FLAG_PIC_AR_NONE (DRM_MODE_PICTURE_ASPECT_NONE << 19)
72 #define DRM_MODE_FLAG_PIC_AR_4_3 (DRM_MODE_PICTURE_ASPECT_4_3 << 19)
73 #define DRM_MODE_FLAG_PIC_AR_16_9 (DRM_MODE_PICTURE_ASPECT_16_9 << 19)
74 #define DRM_MODE_FLAG_PIC_AR_64_27 (DRM_MODE_PICTURE_ASPECT_64_27 << 19)
75 #define DRM_MODE_FLAG_PIC_AR_256_135 (DRM_MODE_PICTURE_ASPECT_256_135 << 19)
76 #define DRM_MODE_FLAG_SUPPORTS_RGB (1 << 27)
77 #define DRM_MODE_FLAG_SUPPORTS_YUV (1 << 28)
78 #define DRM_MODE_FLAG_VID_MODE_PANEL (1 << 29)
79 #define DRM_MODE_FLAG_CMD_MODE_PANEL (1 << 30)
80 #define DRM_MODE_FLAG_SEAMLESS (1 << 31)
81 #define DRM_MODE_FLAG_ALL (DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLSCAN | DRM_MODE_FLAG_CSYNC | DRM_MODE_FLAG_PCSYNC | DRM_MODE_FLAG_NCSYNC | DRM_MODE_FLAG_HSKEW | DRM_MODE_FLAG_DBLCLK | DRM_MODE_FLAG_CLKDIV2 | DRM_MODE_FLAG_SUPPORTS_RGB | DRM_MODE_FLAG_SUPPORTS_YUV | DRM_MODE_FLAG_VID_MODE_PANEL | DRM_MODE_FLAG_CMD_MODE_PANEL | DRM_MODE_FLAG_3D_MASK)
82 #define DRM_MODE_DPMS_ON 0
83 #define DRM_MODE_DPMS_STANDBY 1
84 #define DRM_MODE_DPMS_SUSPEND 2
85 #define DRM_MODE_DPMS_OFF 3
86 #define DRM_MODE_SCALE_NONE 0
87 #define DRM_MODE_SCALE_FULLSCREEN 1
88 #define DRM_MODE_SCALE_CENTER 2
89 #define DRM_MODE_SCALE_ASPECT 3
90 #define DRM_MODE_DITHERING_OFF 0
91 #define DRM_MODE_DITHERING_ON 1
92 #define DRM_MODE_DITHERING_AUTO 2
93 #define DRM_MODE_DIRTY_OFF 0
94 #define DRM_MODE_DIRTY_ON 1
95 #define DRM_MODE_DIRTY_ANNOTATE 2
96 #define DRM_MODE_LINK_STATUS_GOOD 0
97 #define DRM_MODE_LINK_STATUS_BAD 1
98 #define DRM_MODE_ROTATE_0 (1 << 0)
99 #define DRM_MODE_ROTATE_90 (1 << 1)
100 #define DRM_MODE_ROTATE_180 (1 << 2)
101 #define DRM_MODE_ROTATE_270 (1 << 3)
102 #define DRM_MODE_ROTATE_MASK (DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_180 | DRM_MODE_ROTATE_270)
103 #define DRM_MODE_REFLECT_X (1 << 4)
104 #define DRM_MODE_REFLECT_Y (1 << 5)
105 #define DRM_MODE_REFLECT_MASK (DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y)
106 #define DRM_MODE_CONTENT_PROTECTION_UNDESIRED 0
107 #define DRM_MODE_CONTENT_PROTECTION_DESIRED 1
108 #define DRM_MODE_CONTENT_PROTECTION_ENABLED 2
109 struct drm_mode_modeinfo {
110   __u32 clock;
111   __u16 hdisplay;
112   __u16 hsync_start;
113   __u16 hsync_end;
114   __u16 htotal;
115   __u16 hskew;
116   __u16 vdisplay;
117   __u16 vsync_start;
118   __u16 vsync_end;
119   __u16 vtotal;
120   __u16 vscan;
121   __u32 vrefresh;
122   __u32 flags;
123   __u32 type;
124   char name[DRM_DISPLAY_MODE_LEN];
125 };
126 struct drm_mode_card_res {
127   __u64 fb_id_ptr;
128   __u64 crtc_id_ptr;
129   __u64 connector_id_ptr;
130   __u64 encoder_id_ptr;
131   __u32 count_fbs;
132   __u32 count_crtcs;
133   __u32 count_connectors;
134   __u32 count_encoders;
135   __u32 min_width;
136   __u32 max_width;
137   __u32 min_height;
138   __u32 max_height;
139 };
140 struct drm_mode_crtc {
141   __u64 set_connectors_ptr;
142   __u32 count_connectors;
143   __u32 crtc_id;
144   __u32 fb_id;
145   __u32 x;
146   __u32 y;
147   __u32 gamma_size;
148   __u32 mode_valid;
149   struct drm_mode_modeinfo mode;
150 };
151 #define DRM_MODE_PRESENT_TOP_FIELD (1 << 0)
152 #define DRM_MODE_PRESENT_BOTTOM_FIELD (1 << 1)
153 struct drm_mode_set_plane {
154   __u32 plane_id;
155   __u32 crtc_id;
156   __u32 fb_id;
157   __u32 flags;
158   __s32 crtc_x;
159   __s32 crtc_y;
160   __u32 crtc_w;
161   __u32 crtc_h;
162   __u32 src_x;
163   __u32 src_y;
164   __u32 src_h;
165   __u32 src_w;
166 };
167 struct drm_mode_get_plane {
168   __u32 plane_id;
169   __u32 crtc_id;
170   __u32 fb_id;
171   __u32 possible_crtcs;
172   __u32 gamma_size;
173   __u32 count_format_types;
174   __u64 format_type_ptr;
175 };
176 struct drm_mode_get_plane_res {
177   __u64 plane_id_ptr;
178   __u32 count_planes;
179 };
180 #define DRM_MODE_ENCODER_NONE 0
181 #define DRM_MODE_ENCODER_DAC 1
182 #define DRM_MODE_ENCODER_TMDS 2
183 #define DRM_MODE_ENCODER_LVDS 3
184 #define DRM_MODE_ENCODER_TVDAC 4
185 #define DRM_MODE_ENCODER_VIRTUAL 5
186 #define DRM_MODE_ENCODER_DSI 6
187 #define DRM_MODE_ENCODER_DPMST 7
188 #define DRM_MODE_ENCODER_DPI 8
189 struct drm_mode_get_encoder {
190   __u32 encoder_id;
191   __u32 encoder_type;
192   __u32 crtc_id;
193   __u32 possible_crtcs;
194   __u32 possible_clones;
195 };
196 enum drm_mode_subconnector {
197   DRM_MODE_SUBCONNECTOR_Automatic = 0,
198   DRM_MODE_SUBCONNECTOR_Unknown = 0,
199   DRM_MODE_SUBCONNECTOR_DVID = 3,
200   DRM_MODE_SUBCONNECTOR_DVIA = 4,
201   DRM_MODE_SUBCONNECTOR_Composite = 5,
202   DRM_MODE_SUBCONNECTOR_SVIDEO = 6,
203   DRM_MODE_SUBCONNECTOR_Component = 8,
204   DRM_MODE_SUBCONNECTOR_SCART = 9,
205 };
206 #define DRM_MODE_CONNECTOR_Unknown 0
207 #define DRM_MODE_CONNECTOR_VGA 1
208 #define DRM_MODE_CONNECTOR_DVII 2
209 #define DRM_MODE_CONNECTOR_DVID 3
210 #define DRM_MODE_CONNECTOR_DVIA 4
211 #define DRM_MODE_CONNECTOR_Composite 5
212 #define DRM_MODE_CONNECTOR_SVIDEO 6
213 #define DRM_MODE_CONNECTOR_LVDS 7
214 #define DRM_MODE_CONNECTOR_Component 8
215 #define DRM_MODE_CONNECTOR_9PinDIN 9
216 #define DRM_MODE_CONNECTOR_DisplayPort 10
217 #define DRM_MODE_CONNECTOR_HDMIA 11
218 #define DRM_MODE_CONNECTOR_HDMIB 12
219 #define DRM_MODE_CONNECTOR_TV 13
220 #define DRM_MODE_CONNECTOR_eDP 14
221 #define DRM_MODE_CONNECTOR_VIRTUAL 15
222 #define DRM_MODE_CONNECTOR_DSI 16
223 #define DRM_MODE_CONNECTOR_DPI 17
224 #define DRM_MODE_CONNECTOR_WRITEBACK 18
225 #define DRM_MODE_CONNECTOR_SPI 19
226 struct drm_mode_get_connector {
227   __u64 encoders_ptr;
228   __u64 modes_ptr;
229   __u64 props_ptr;
230   __u64 prop_values_ptr;
231   __u32 count_modes;
232   __u32 count_props;
233   __u32 count_encoders;
234   __u32 encoder_id;
235   __u32 connector_id;
236   __u32 connector_type;
237   __u32 connector_type_id;
238   __u32 connection;
239   __u32 mm_width;
240   __u32 mm_height;
241   __u32 subpixel;
242   __u32 pad;
243 };
244 #define DRM_MODE_PROP_PENDING (1 << 0)
245 #define DRM_MODE_PROP_RANGE (1 << 1)
246 #define DRM_MODE_PROP_IMMUTABLE (1 << 2)
247 #define DRM_MODE_PROP_ENUM (1 << 3)
248 #define DRM_MODE_PROP_BLOB (1 << 4)
249 #define DRM_MODE_PROP_BITMASK (1 << 5)
250 #define DRM_MODE_PROP_LEGACY_TYPE (DRM_MODE_PROP_RANGE | DRM_MODE_PROP_ENUM | DRM_MODE_PROP_BLOB | DRM_MODE_PROP_BITMASK)
251 #define DRM_MODE_PROP_EXTENDED_TYPE 0x0000ffc0
252 #define DRM_MODE_PROP_TYPE(n) ((n) << 6)
253 #define DRM_MODE_PROP_OBJECT DRM_MODE_PROP_TYPE(1)
254 #define DRM_MODE_PROP_SIGNED_RANGE DRM_MODE_PROP_TYPE(2)
255 #define DRM_MODE_PROP_ATOMIC 0x80000000
256 struct drm_mode_property_enum {
257   __u64 value;
258   char name[DRM_PROP_NAME_LEN];
259 };
260 struct drm_mode_get_property {
261   __u64 values_ptr;
262   __u64 enum_blob_ptr;
263   __u32 prop_id;
264   __u32 flags;
265   char name[DRM_PROP_NAME_LEN];
266   __u32 count_values;
267   __u32 count_enum_blobs;
268 };
269 struct drm_mode_connector_set_property {
270   __u64 value;
271   __u32 prop_id;
272   __u32 connector_id;
273 };
274 #define DRM_MODE_OBJECT_CRTC 0xcccccccc
275 #define DRM_MODE_OBJECT_CONNECTOR 0xc0c0c0c0
276 #define DRM_MODE_OBJECT_ENCODER 0xe0e0e0e0
277 #define DRM_MODE_OBJECT_MODE 0xdededede
278 #define DRM_MODE_OBJECT_PROPERTY 0xb0b0b0b0
279 #define DRM_MODE_OBJECT_FB 0xfbfbfbfb
280 #define DRM_MODE_OBJECT_BLOB 0xbbbbbbbb
281 #define DRM_MODE_OBJECT_PLANE 0xeeeeeeee
282 #define DRM_MODE_OBJECT_ANY 0
283 struct drm_mode_obj_get_properties {
284   __u64 props_ptr;
285   __u64 prop_values_ptr;
286   __u32 count_props;
287   __u32 obj_id;
288   __u32 obj_type;
289 };
290 struct drm_mode_obj_set_property {
291   __u64 value;
292   __u32 prop_id;
293   __u32 obj_id;
294   __u32 obj_type;
295 };
296 struct drm_mode_get_blob {
297   __u32 blob_id;
298   __u32 length;
299   __u64 data;
300 };
301 struct drm_mode_fb_cmd {
302   __u32 fb_id;
303   __u32 width;
304   __u32 height;
305   __u32 pitch;
306   __u32 bpp;
307   __u32 depth;
308   __u32 handle;
309 };
310 #define DRM_MODE_FB_INTERLACED (1 << 0)
311 #define DRM_MODE_FB_MODIFIERS (1 << 1)
312 #define DRM_MODE_FB_SECURE (1 << 2)
313 struct drm_mode_fb_cmd2 {
314   __u32 fb_id;
315   __u32 width;
316   __u32 height;
317   __u32 pixel_format;
318   __u32 flags;
319   __u32 handles[4];
320   __u32 pitches[4];
321   __u32 offsets[4];
322   __u64 modifier[4];
323 };
324 #define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
325 #define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02
326 #define DRM_MODE_FB_DIRTY_FLAGS 0x03
327 #define DRM_MODE_FB_DIRTY_MAX_CLIPS 256
328 struct drm_mode_fb_dirty_cmd {
329   __u32 fb_id;
330   __u32 flags;
331   __u32 color;
332   __u32 num_clips;
333   __u64 clips_ptr;
334 };
335 struct drm_mode_mode_cmd {
336   __u32 connector_id;
337   struct drm_mode_modeinfo mode;
338 };
339 #define DRM_MODE_CURSOR_BO 0x01
340 #define DRM_MODE_CURSOR_MOVE 0x02
341 #define DRM_MODE_CURSOR_FLAGS 0x03
342 struct drm_mode_cursor {
343   __u32 flags;
344   __u32 crtc_id;
345   __s32 x;
346   __s32 y;
347   __u32 width;
348   __u32 height;
349   __u32 handle;
350 };
351 struct drm_mode_cursor2 {
352   __u32 flags;
353   __u32 crtc_id;
354   __s32 x;
355   __s32 y;
356   __u32 width;
357   __u32 height;
358   __u32 handle;
359   __s32 hot_x;
360   __s32 hot_y;
361 };
362 struct drm_mode_crtc_lut {
363   __u32 crtc_id;
364   __u32 gamma_size;
365   __u64 red;
366   __u64 green;
367   __u64 blue;
368 };
369 struct drm_color_ctm {
370   __u64 matrix[9];
371 };
372 struct drm_color_lut {
373   __u16 red;
374   __u16 green;
375   __u16 blue;
376   __u16 reserved;
377 };
378 struct hdr_metadata_infoframe {
379   __u8 eotf;
380   __u8 metadata_type;
381   struct {
382     __u16 x, y;
383   } display_primaries[3];
384   struct {
385     __u16 x, y;
386   } white_point;
387   __u16 max_display_mastering_luminance;
388   __u16 min_display_mastering_luminance;
389   __u16 max_cll;
390   __u16 max_fall;
391 };
392 struct hdr_output_metadata {
393   __u32 metadata_type;
394   union {
395     struct hdr_metadata_infoframe hdmi_metadata_type1;
396   };
397 };
398 #define DRM_MODE_PAGE_FLIP_EVENT 0x01
399 #define DRM_MODE_PAGE_FLIP_ASYNC 0x02
400 #define DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE 0x4
401 #define DRM_MODE_PAGE_FLIP_TARGET_RELATIVE 0x8
402 #define DRM_MODE_PAGE_FLIP_TARGET (DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE | DRM_MODE_PAGE_FLIP_TARGET_RELATIVE)
403 #define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT | DRM_MODE_PAGE_FLIP_ASYNC | DRM_MODE_PAGE_FLIP_TARGET)
404 struct drm_mode_crtc_page_flip {
405   __u32 crtc_id;
406   __u32 fb_id;
407   __u32 flags;
408   __u32 reserved;
409   __u64 user_data;
410 };
411 struct drm_mode_crtc_page_flip_target {
412   __u32 crtc_id;
413   __u32 fb_id;
414   __u32 flags;
415   __u32 sequence;
416   __u64 user_data;
417 };
418 struct drm_mode_create_dumb {
419   __u32 height;
420   __u32 width;
421   __u32 bpp;
422   __u32 flags;
423   __u32 handle;
424   __u32 pitch;
425   __u64 size;
426 };
427 struct drm_mode_map_dumb {
428   __u32 handle;
429   __u32 pad;
430   __u64 offset;
431 };
432 struct drm_mode_destroy_dumb {
433   __u32 handle;
434 };
435 #define DRM_MODE_ATOMIC_TEST_ONLY 0x0100
436 #define DRM_MODE_ATOMIC_NONBLOCK 0x0200
437 #define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400
438 #define DRM_MODE_ATOMIC_FLAGS (DRM_MODE_PAGE_FLIP_EVENT | DRM_MODE_PAGE_FLIP_ASYNC | DRM_MODE_ATOMIC_TEST_ONLY | DRM_MODE_ATOMIC_NONBLOCK | DRM_MODE_ATOMIC_ALLOW_MODESET)
439 struct drm_mode_atomic {
440   __u32 flags;
441   __u32 count_objs;
442   __u64 objs_ptr;
443   __u64 count_props_ptr;
444   __u64 props_ptr;
445   __u64 prop_values_ptr;
446   __u64 reserved;
447   __u64 user_data;
448 };
449 struct drm_format_modifier_blob {
450 #define FORMAT_BLOB_CURRENT 1
451   __u32 version;
452   __u32 flags;
453   __u32 count_formats;
454   __u32 formats_offset;
455   __u32 count_modifiers;
456   __u32 modifiers_offset;
457 };
458 struct drm_format_modifier {
459   __u64 formats;
460   __u32 offset;
461   __u32 pad;
462   __u64 modifier;
463 };
464 struct drm_mode_create_blob {
465   __u64 data;
466   __u32 length;
467   __u32 blob_id;
468 };
469 struct drm_mode_destroy_blob {
470   __u32 blob_id;
471 };
472 struct drm_mode_create_lease {
473   __u64 object_ids;
474   __u32 object_count;
475   __u32 flags;
476   __u32 lessee_id;
477   __u32 fd;
478 };
479 struct drm_mode_list_lessees {
480   __u32 count_lessees;
481   __u32 pad;
482   __u64 lessees_ptr;
483 };
484 struct drm_mode_get_lease {
485   __u32 count_objects;
486   __u32 pad;
487   __u64 objects_ptr;
488 };
489 struct drm_mode_revoke_lease {
490   __u32 lessee_id;
491 };
492 struct drm_mode_rect {
493   __s32 x1;
494   __s32 y1;
495   __s32 x2;
496   __s32 y2;
497 };
498 #ifdef __cplusplus
499 }
500 #endif
501 #endif
502