Searched refs:regV (Results 1 – 4 of 4) sorted by relevance
80 int regV; in run() local82 while ( 0 <= (regV = worklist.nextSetBit(0)) ) { in run()83 worklist.clear(regV); in run()85 if (useList[regV].size() == 0 in run()86 || isCircularNoSideEffect(regV, null)) { in run()88 SsaInsn insnS = ssaMeth.getDefinitionForRegister(regV); in run()178 private boolean isCircularNoSideEffect(int regV, BitSet set) { in isCircularNoSideEffect() argument179 if ((set != null) && set.get(regV)) { in isCircularNoSideEffect()183 for (SsaInsn use : useList[regV]) { in isCircularNoSideEffect()194 set.set(regV); in isCircularNoSideEffect()[all …]
791 public void addLiveOut (int regV) { in addLiveOut() argument796 liveOut.add(regV); in addLiveOut()805 public void addLiveIn (int regV) { in addLiveIn() argument810 liveIn.add(regV); in addLiveIn()
54 private final int regV; field in LivenessAnalyzer116 this.regV = reg; in LivenessAnalyzer()154 List<SsaInsn> useList = ssaMeth.getUseListForRegister(regV); in run()164 phi.predBlocksForReg(regV, ssaMeth)) { in run()200 blockN.addLiveOut(regV); in liveOutAtBlock()219 blockN.addLiveIn(regV); in liveInAtStatement()238 if (!statement.isResultReg(regV)) { in liveOutAtStatement()240 interference.add(regV, rs.getReg()); in liveOutAtStatement()
54 public void add(int regV, int regW) { in add() argument55 ensureCapacity(Math.max(regV, regW) + 1); in add()57 interference.get(regV).add(regW); in add()58 interference.get(regW).add(regV); in add()