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Searched refs:NVIC_STIR_INTID_Pos (Results 1 – 4 of 4) sorted by relevance

/device/google/contexthub/firmware/os/cpu/cortexm4/inc/cpu/cmsis/
Dcore_cm3.h334 #define NVIC_STIR_INTID_Pos 0 /*!< STIR: I… macro
335 #define NVIC_STIR_INTID_Msk (0x1FFUL << NVIC_STIR_INTID_Pos) /*!< STIR: I…
Dcore_sc300.h334 #define NVIC_STIR_INTID_Pos 0 /*!< STIR: I… macro
335 #define NVIC_STIR_INTID_Msk (0x1FFUL << NVIC_STIR_INTID_Pos) /*!< STIR: I…
Dcore_cm4.h381 #define NVIC_STIR_INTID_Pos 0 /*!< STIR: I… macro
382 #define NVIC_STIR_INTID_Msk (0x1FFUL << NVIC_STIR_INTID_Pos) /*!< STIR: I…
Dcore_cm7.h396 #define NVIC_STIR_INTID_Pos 0 /*!< STIR: I… macro
397 #define NVIC_STIR_INTID_Msk (0x1FFUL << NVIC_STIR_INTID_Pos) /*!< STIR: I…