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/hardware/qcom/sdm845/data/ipacfg-mgr/ipacm/inc/
DIPACM_ConntrackClient.h106 #define log_nat(A,B,C,D,E,F) \ argument
107 ….%d.%d\t private port: %d public port: %d %s",A,((B>>24) & 0xFF), ((B>>16) & 0xFF), ((B>>8) & 0xFF…
/hardware/qcom/sm8150/data/ipacfg-mgr/ipacm/inc/
DIPACM_ConntrackClient.h106 #define log_nat(A,B,C,D,E,F) \ argument
107 ….%d.%d\t private port: %d public port: %d %s",A,((B>>24) & 0xFF), ((B>>16) & 0xFF), ((B>>8) & 0xFF…
/hardware/qcom/data/ipacfg-mgr/msm8998/ipacm/inc/
DIPACM_ConntrackClient.h106 #define log_nat(A,B,C,D,E,F) \ argument
107 ….%d.%d\t private port: %d public port: %d %s",A,((B>>24) & 0xFF), ((B>>16) & 0xFF), ((B>>8) & 0xFF…
/hardware/nxp/nfc/halimpl/
Dlibnfc-nxp-PN551_example.conf74 NXP_EXT_TVDD_CFG_1={20, 02, 0B, 02, A0, 66, 01, 00, A0, 0E, 03, 02, 09, 00}
79 NXP_EXT_TVDD_CFG_2={20, 02, 0B, 02, A0, 66, 01, 00, A0, 0E, 03, 56, 24, 08 }
84 NXP_EXT_TVDD_CFG_3={20, 02, 0B, 02, A0, 66, 01, 01, A0, 0E, 03, 52, 40, 0A}
160 5B, 01, 00,
Dlibnfc-nxp-PN548AD_example.conf88 NXP_EXT_TVDD_CFG_1={20, 02, 0B, 02, A0, 66, 01, 00, A0, 0E, 03, 02, 09, 00}
93 NXP_EXT_TVDD_CFG_2={20, 02, 0B, 02, A0, 66, 01, 00, A0, 0E, 03, 56, 64, 0A}
98 NXP_EXT_TVDD_CFG_3={20, 02, 0B, 02, A0, 66, 01, 01, A0, 0E, 03, 52, 64, 0A}
174 5B, 01, 00,
Dlibnfc-nxp-PN66T_example.conf87 NXP_EXT_TVDD_CFG_1={20, 02, 0B, 02, A0, 66, 01, 00, A0, 0E, 03, 02, 09, 00}
92 NXP_EXT_TVDD_CFG_2={20, 02, 0B, 02, A0, 66, 01, 00, A0, 0E, 03, 56, 64, 0A}
97 NXP_EXT_TVDD_CFG_3={20, 02, 0B, 02, A0, 66, 01, 01, A0, 0E, 03, 52, 64, 0A}
175 5B, 01, 00,
Dlibnfc-nxp-PN80T_example_NCI2_0.conf69 NXP_EXT_TVDD_CFG_1={20, 02, 0F, 01, A0, 0E, 0B, 31, 01, 01, 31, 00, 00, 00, 01, 00, D0, 0C}
74 NXP_EXT_TVDD_CFG_2={20, 02, 0F, 01, A0, 0E, 0B, 11, 01, C2, B2, 00, B2, 1E, 1F, 00, D0, 0C}
173 5B, 01, 00,
Dlibnfc-nxp-PN81T_example_NCI2_0.conf69 NXP_EXT_TVDD_CFG_1={20, 02, 0F, 01, A0, 0E, 0B, 31, 01, 01, 31, 00, 00, 00, 01, 00, D0, 0C}
74 NXP_EXT_TVDD_CFG_2={20, 02, 0F, 01, A0, 0E, 0B, 11, 01, C2, B2, 00, B2, 1E, 1F, 00, D0, 0C}
169 5B, 01, 00,
Dlibnfc-nxp-PN81B_example_NCI2_0.conf75 NXP_EXT_TVDD_CFG_1={20, 02, 0F, 01, A0, 0E, 0B, 31, 01, 01, 31, 00, 00, 00, 01, 00, D0, 0C}
80 NXP_EXT_TVDD_CFG_2={20, 02, 0F, 01, A0, 0E, 0B, 11, 01, C2, B2, 00, B2, 1E, 1F, 00, D0, 0C}
176 5B, 01, 00,
Dlibnfc-nxp-PN553_example.conf83 NXP_EXT_TVDD_CFG_1={20, 02, 0F, 01, A0, 0E, 0B, 31, 01, 01, 31, 00, 00, 00, 01, 00, D0, 0C}
88 NXP_EXT_TVDD_CFG_2={20, 02, 0F, 01, A0, 0E, 0B, 11, 01, C2, B2, 00, B2, 1E, 1F, 00, D0, 0C}
189 5B, 01, 00,
Dlibnfc-nxp-PN553_example_NCI2_0.conf83 NXP_EXT_TVDD_CFG_1={20, 02, 0F, 01, A0, 0E, 0B, 31, 01, 01, 31, 00, 00, 00, 01, 00, D0, 0C}
88 NXP_EXT_TVDD_CFG_2={20, 02, 0F, 01, A0, 0E, 0B, 11, 01, C2, B2, 00, B2, 1E, 1F, 00, D0, 0C}
190 5B, 01, 00,
Dlibnfc-nxp-PN80T_example.conf83 NXP_EXT_TVDD_CFG_1={20, 02, 0F, 01, A0, 0E, 0B, 31, 01, 01, 31, 00, 00, 00, 01, 00, D0, 0C}
88 NXP_EXT_TVDD_CFG_2={20, 02, 0F, 01, A0, 0E, 0B, 11, 01, C2, B2, 00, B2, 1E, 1F, 00, D0, 0C}
192 5B, 01, 00,
Dlibnfc-nxp-PN547C2_example.conf139 NXP_CORE_CONF={ 20, 02, 2B, 0D,
147 5B, 01, 00,
Dlibnfc-nxp-PN65T_example.conf141 NXP_CORE_CONF={ 20, 02, 2B, 0D,
149 5B, 01, 00,
/hardware/interfaces/tests/foo/1.0/
Dtypes.hal51 B,
56 B,
63 B = 7,
/hardware/google/av/codec2/include/
DC2Param.h620 template<typename T, class B=typename std::remove_extent<T>::type>
624 _mSize(sizeof(B)) { } in _C2FieldId()
642 template<typename R, typename T, typename U, typename B=typename std::remove_extent<R>::type>
645 _mSize(sizeof(B)) { } in _C2FieldId()
652 template<typename R, typename T, typename B=typename std::remove_extent<R>::type>
655 _mSize(sizeof(B)) { } in _C2FieldId()
870 template<typename T, bool B = std::is_enum<T>::value>
872 return TypeFor<T, B>(); in typeFor()
985 template<typename B>
986 static NamedValuesType namedValuesFor(const B &);
[all …]
/hardware/qcom/neuralnetworks/hvxservice/1.0/
DHexagonModel.h104 hexagon_nn_input createTensor(uint32_t B, uint32_t H, uint32_t W, uint32_t D,
106 hexagon_nn_input createShape(uint32_t B, uint32_t H, uint32_t W, uint32_t D);
142 hexagon_nn_input createTensorInternal(uint32_t B, uint32_t H, uint32_t W, uint32_t D,
176 hexagon_nn_input Model::createTensor(uint32_t B, uint32_t H, uint32_t W, uint32_t D, in createTensor() argument
178 return createTensorInternal(B, H, W, D, reinterpret_cast<const uint8_t*>(values.data()), in createTensor()
/hardware/libhardware/tests/hwc/
Dutil.c114 EGLint R,G,B,A; in select_config_for_window() local
121 R = G = B = A = 8; in select_config_for_window()
124 R = 5; G = 6; B = 5; A = 0; in select_config_for_window()
151 if (r == R && g == G && b == B && a == A) { in select_config_for_window()
/hardware/libhardware/include/hardware/
Dhardware.h32 #define MAKE_TAG_CONSTANT(A,B,C,D) (((A) << 24) | ((B) << 16) | ((C) << 8) | (D)) argument
/hardware/interfaces/tests/trie/1.0/
Dtypes.hal32 vec<B> b;
35 struct B {
/hardware/interfaces/automotive/evs/1.0/vts/functional/
DFormatConvert.cpp54 unsigned char B = (unsigned char)clamp(Bf, 0.0f, 255.0f); in yuvToRgbx() local
59 (B << 16) | in yuvToRgbx()
64 (B ) | in yuvToRgbx()
/hardware/interfaces/wifi/supplicant/1.2/
DISupplicantStaNetwork.hal40 /** WPA3-Enterprise Suite-B Key management */
185 * Enable TLS Suite-B in EAP Phase1
187 * @param enable Set to true to enable TLS Suite-B in EAP phase1
200 * Set EAP OpenSSL Suite-B-192 ciphers for WPA3-Enterprise
/hardware/interfaces/boot/1.0/
DIBootControl.hal34 * 1, a system with A/B must return 2, A/B/C -> 3 and so on. A system with
44 * slot is A, then the block devices underlying B can be accessed directly
/hardware/qcom/display/msm8998/include/
Dcolor_metadata.h155 uint32_t B: 10; member
/hardware/qcom/display/msm8909/include/
Dcolor_metadata.h155 uint32_t B: 10; member

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