Searched refs:bit_clk_rate (Results 1 – 13 of 13) sorted by relevance
87 bitclk_rates_.push_back(mode_info.bit_clk_rate); in PopulateBitClkRates()88 DLOGI("Possible bit_clk_rates %d", mode_info.bit_clk_rate); in PopulateBitClkRates()96 DisplayError HWPeripheralDRM::SetDynamicDSIClock(uint64_t bit_clk_rate) { in SetDynamicDSIClock() argument97 bit_clk_rate_ = bit_clk_rate; in SetDynamicDSIClock()103 DisplayError HWPeripheralDRM::GetDynamicDSIClock(uint64_t *bit_clk_rate) { in GetDynamicDSIClock() argument105 *bit_clk_rate = (uint32_t)connector_info_.modes[current_mode_index_].bit_clk_rate; in GetDynamicDSIClock()
60 virtual DisplayError SetDynamicDSIClock(uint64_t bit_clk_rate);61 virtual DisplayError GetDynamicDSIClock(uint64_t *bit_clk_rate);
124 virtual DisplayError SetDynamicDSIClock(uint64_t bit_clk_rate);125 virtual DisplayError GetDynamicDSIClock(uint64_t *bit_clk_rate);
819 uint64_t current_bit_clk = connector_info_.modes[current_mode_index_].bit_clk_rate; in SetDisplayAttributes()824 (current_bit_clk == connector_info_.modes[mode_index].bit_clk_rate)) { in SetDisplayAttributes()980 uint64_t current_bit_clk = connector_info_.modes[index].bit_clk_rate; in SetupAtomic()1157 (current_bit_clk == connector_info_.modes[mode_index].bit_clk_rate) && in SetupAtomic()1170 (bit_clk_rate_ == connector_info_.modes[mode_index].bit_clk_rate)) { in SetupAtomic()1367 uint64_t current_bit_clk = connector_info_.modes[current_mode_index_].bit_clk_rate; in AtomicCommit()1371 (current_bit_clk == connector_info_.modes[mode_index].bit_clk_rate) && in AtomicCommit()1387 (bit_clk_rate_ == connector_info_.modes[mode_index].bit_clk_rate)) { in AtomicCommit()1612 uint64_t current_bit_clk = connector_info_.modes[current_mode_index_].bit_clk_rate; in SetRefreshRate()1616 (current_bit_clk == connector_info_.modes[mode_index].bit_clk_rate) && in SetRefreshRate()[all …]
108 MAKE_NO_OP(SetDynamicDSIClock(uint64_t bit_clk_rate))109 MAKE_NO_OP(GetDynamicDSIClock(uint64_t *bit_clk_rate))
718 DisplayError DisplayBuiltIn::SetDynamicDSIClock(uint64_t bit_clk_rate) { in SetDynamicDSIClock() argument727 bool valid = std::find(clk_rates.begin(), clk_rates.end(), bit_clk_rate) != clk_rates.end(); in SetDynamicDSIClock()728 if (current_clk == bit_clk_rate || !valid) { in SetDynamicDSIClock()729 DLOGI("Invalid setting %d, Clk. already set %d", !valid, (current_clk == bit_clk_rate)); in SetDynamicDSIClock()733 return hw_intf_->SetDynamicDSIClock(bit_clk_rate); in SetDynamicDSIClock()736 DisplayError DisplayBuiltIn::GetDynamicDSIClock(uint64_t *bit_clk_rate) { in GetDynamicDSIClock() argument742 return hw_intf_->GetDynamicDSIClock(bit_clk_rate); in GetDynamicDSIClock()
125 virtual DisplayError SetDynamicDSIClock(uint64_t bit_clk_rate) = 0;126 virtual DisplayError GetDynamicDSIClock(uint64_t *bit_clk_rate) = 0;
120 virtual DisplayError SetDynamicDSIClock(uint64_t bit_clk_rate);121 virtual DisplayError GetDynamicDSIClock(uint64_t *bit_clk_rate);
97 virtual DisplayError SetDynamicDSIClock(uint64_t bit_clk_rate) { in SetDynamicDSIClock() argument100 virtual DisplayError GetDynamicDSIClock(uint64_t *bit_clk_rate) { in GetDynamicDSIClock() argument
113 virtual DisplayError SetDynamicDSIClock(uint64_t bit_clk_rate);114 virtual DisplayError GetDynamicDSIClock(uint64_t *bit_clk_rate);
1409 DisplayError HWDevice::SetDynamicDSIClock(uint64_t bit_clk_rate) { in SetDynamicDSIClock() argument1413 DisplayError HWDevice::GetDynamicDSIClock(uint64_t *bit_clk_rate) { in GetDynamicDSIClock() argument
815 virtual DisplayError SetDynamicDSIClock(uint64_t bit_clk_rate) = 0;823 virtual DisplayError GetDynamicDSIClock(uint64_t *bit_clk_rate) = 0;
589 uint64_t bit_clk_rate; member