/system/core/libpixelflinger/codeflinger/ |
D | MIPSAssembler.h | 70 virtual uint32_t reg_reg(int Rm, int type, int Rs); 94 int Rd, int Rm, int Rs, int Rn); 96 int Rd, int Rm, int Rs); 98 int RdLo, int RdHi, int Rm, int Rs); 100 int RdLo, int RdHi, int Rm, int Rs); 102 int RdLo, int RdHi, int Rm, int Rs); 104 int RdLo, int RdHi, int Rm, int Rs); 148 int Rd, int Rm, int Rs); 150 int Rd, int Rm, int Rs); 152 int Rd, int Rm, int Rs, int Rn); [all …]
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D | ARMAssemblerInterface.h | 83 virtual uint32_t reg_reg(int Rm, int type, int Rs) = 0; 129 int Rd, int Rm, int Rs, int Rn) = 0; 131 int Rd, int Rm, int Rs) = 0; 133 int RdLo, int RdHi, int Rm, int Rs) = 0; 135 int RdLo, int RdHi, int Rm, int Rs) = 0; 137 int RdLo, int RdHi, int Rm, int Rs) = 0; 139 int RdLo, int RdHi, int Rm, int Rs) = 0; 205 int Rd, int Rm, int Rs) = 0; 207 int Rd, int Rm, int Rs) = 0; 209 int Rd, int Rm, int Rs, int Rn) = 0; [all …]
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D | MIPSAssembler.cpp | 247 int Rs __unused) in reg_reg() 608 int Rd, int Rm, int Rs, int Rn) { in MLA() argument 612 mMips->MUL(R_at, Rm, Rs); in MLA() 621 int Rd, int Rm, int Rs) { in MUL() argument 623 mMips->MUL(Rd, Rm, Rs); in MUL() 631 int RdLo, int RdHi, int Rm, int Rs) { in UMULL() argument 633 mMips->MULT(Rm, Rs); in UMULL() 644 int RdLo __unused, int RdHi, int Rm __unused, int Rs __unused) { in UMUAL() 646 "UMUAL(r%u,r%u,r%u,r%u)", RdLo,RdHi,Rm,Rs); in UMUAL() 660 int RdLo __unused, int RdHi, int Rm __unused, int Rs __unused) { in SMULL() [all …]
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D | ARMAssembler.cpp | 215 int Rd, int Rm, int Rs, int Rn) { in MLA() argument 216 if (Rd == Rm) { int t = Rm; Rm=Rs; Rs=t; } in MLA() 217 LOG_FATAL_IF(Rd==Rm, "MLA(r%u,r%u,r%u,r%u)", Rd,Rm,Rs,Rn); in MLA() 219 (Rd<<16) | (Rn<<12) | (Rs<<8) | 0x90 | Rm; in MLA() 222 int Rd, int Rm, int Rs) { in MUL() argument 223 if (Rd == Rm) { int t = Rm; Rm=Rs; Rs=t; } in MUL() 224 LOG_FATAL_IF(Rd==Rm, "MUL(r%u,r%u,r%u)", Rd,Rm,Rs); in MUL() 225 *mPC++ = (cc<<28) | (s<<20) | (Rd<<16) | (Rs<<8) | 0x90 | Rm; in MUL() 228 int RdLo, int RdHi, int Rm, int Rs) { in UMULL() argument 230 "UMULL(r%u,r%u,r%u,r%u)", RdLo,RdHi,Rm,Rs); in UMULL() [all …]
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D | ARMAssemblerProxy.cpp | 103 uint32_t ARMAssemblerProxy::reg_reg(int Rm, int type, int Rs) in reg_reg() argument 105 return mTarget->reg_reg(Rm, type, Rs); in reg_reg() 166 void ARMAssemblerProxy::MLA(int cc, int s, int Rd, int Rm, int Rs, int Rn) { in MLA() argument 167 mTarget->MLA(cc, s, Rd, Rm, Rs, Rn); in MLA() 169 void ARMAssemblerProxy::MUL(int cc, int s, int Rd, int Rm, int Rs) { in MUL() argument 170 mTarget->MUL(cc, s, Rd, Rm, Rs); in MUL() 173 int RdLo, int RdHi, int Rm, int Rs) { in UMULL() argument 174 mTarget->UMULL(cc, s, RdLo, RdHi, Rm, Rs); in UMULL() 177 int RdLo, int RdHi, int Rm, int Rs) { in UMUAL() argument 178 mTarget->UMUAL(cc, s, RdLo, RdHi, Rm, Rs); in UMUAL() [all …]
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D | MIPS64Assembler.h | 75 virtual uint32_t reg_reg(int Rm, int type, int Rs); 99 int Rd, int Rm, int Rs, int Rn); 101 int Rd, int Rm, int Rs); 103 int RdLo, int RdHi, int Rm, int Rs); 105 int RdLo, int RdHi, int Rm, int Rs); 107 int RdLo, int RdHi, int Rm, int Rs); 109 int RdLo, int RdHi, int Rm, int Rs); 153 int Rd, int Rm, int Rs); 155 int Rd, int Rm, int Rs); 157 int Rd, int Rm, int Rs, int Rn); [all …]
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D | ARMAssembler.h | 72 virtual uint32_t reg_reg(int Rm, int type, int Rs); 94 int Rd, int Rm, int Rs, int Rn); 96 int Rd, int Rm, int Rs); 98 int RdLo, int RdHi, int Rm, int Rs); 100 int RdLo, int RdHi, int Rm, int Rs); 102 int RdLo, int RdHi, int Rm, int Rs); 104 int RdLo, int RdHi, int Rm, int Rs); 149 int Rd, int Rm, int Rs); 151 int Rd, int Rm, int Rs); 153 int Rd, int Rm, int Rs, int Rn); [all …]
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D | ARMAssemblerProxy.h | 61 virtual uint32_t reg_reg(int Rm, int type, int Rs); 83 int Rd, int Rm, int Rs, int Rn); 85 int Rd, int Rm, int Rs); 87 int RdLo, int RdHi, int Rm, int Rs); 89 int RdLo, int RdHi, int Rm, int Rs); 91 int RdLo, int RdHi, int Rm, int Rs); 93 int RdLo, int RdHi, int Rm, int Rs); 136 int Rd, int Rm, int Rs); 138 int Rd, int Rm, int Rs); 140 int Rd, int Rm, int Rs, int Rn); [all …]
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D | MIPS64Assembler.cpp | 236 int Rs __unused) in reg_reg() 595 int Rd, int Rm, int Rs, int Rn) { in MLA() argument 600 mMips->MUL(R_at, Rm, Rs); in MLA() 609 int Rd, int Rm, int Rs) { in MUL() argument 611 mMips->MUL(Rd, Rm, Rs); in MUL() 619 int RdLo, int RdHi, int Rm, int Rs) { in UMULL() argument 621 mMips->MUH(RdHi, Rm, Rs); in UMULL() 622 mMips->MUL(RdLo, Rm, Rs); in UMULL() 632 int RdLo __unused, int RdHi, int Rm __unused, int Rs __unused) { in UMUAL() 634 "UMUAL(r%u,r%u,r%u,r%u)", RdLo,RdHi,Rm,Rs); in UMUAL() [all …]
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D | Arm64Assembler.h | 85 virtual uint32_t reg_reg(int Rm, int type, int Rs); 102 int Rd, int Rm, int Rs, int Rn); 104 int Rd, int Rm, int Rs); 106 int RdLo, int RdHi, int Rm, int Rs); 108 int RdLo, int RdHi, int Rm, int Rs); 110 int RdLo, int RdHi, int Rm, int Rs); 112 int RdLo, int RdHi, int Rm, int Rs); 166 int Rd, int Rm, int Rs); 168 int Rd, int Rm, int Rs); 170 int Rd, int Rm, int Rs, int Rn); [all …]
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D | Arm64Assembler.cpp | 518 void ArmToArm64Assembler::MLA(int cc, int s,int Rd, int Rm, int Rs, int Rn) in MLA() argument 522 *mPC++ = A64_MADD_W(Rd, Rm, Rs, Rn); in MLA() 526 void ArmToArm64Assembler::MUL(int cc, int s, int Rd, int Rm, int Rs) in MUL() argument 530 *mPC++ = A64_MADD_W(Rd, Rm, Rs, mZeroReg); in MUL() 774 int Rd, int Rm, int Rs) in SMUL() argument 784 *mPC++ = A64_SBFM_W(mTmpReg2, Rs, 16, 31); in SMUL() 786 *mPC++ = A64_SBFM_W(mTmpReg2, Rs, 0, 15); in SMUL() 793 void ArmToArm64Assembler::SMULW(int cc, int y, int Rd, int Rm, int Rs) in SMULW() argument 798 *mPC++ = A64_SBFM_W(mTmpReg1, Rs, 16, 31); in SMULW() 800 *mPC++ = A64_SBFM_W(mTmpReg1, Rs, 0, 15); in SMULW() [all …]
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D | GGLAssembler.cpp | 390 int Rs = scratches.obtain(); in build_scanline_prolog() local 392 CONTEXT_LOAD(Rs, state.buffers.color.stride); in build_scanline_prolog() 394 SMLABB(AL, Rs, Ry, Rs, Rx); // Rs = Rx + Ry*Rs in build_scanline_prolog() 395 base_offset(parts.cbPtr, parts.cbPtr, Rs); in build_scanline_prolog() 396 scratches.recycle(Rs); in build_scanline_prolog() 426 int Rs = dzdx; in build_scanline_prolog() local 428 CONTEXT_LOAD(Rs, state.buffers.depth.stride); in build_scanline_prolog() 430 SMLABB(AL, Rs, Ry, Rs, Rx); in build_scanline_prolog() 431 ADD(AL, 0, Rs, Rs, reg_imm(parts.count.reg, LSR, 16)); in build_scanline_prolog() 432 ADDR_ADD(AL, 0, zbase, zbase, reg_imm(Rs, LSL, 1)); in build_scanline_prolog()
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/system/core/libpixelflinger/tests/arch-arm64/assembler/ |
D | arm64_assembler_test.cpp | 414 uint32_t Rn = 1, uint32_t Rm = 2, uint32_t Rs = 3) in dataOpTest() argument 429 regs[Rs] = test.RsValue; in dataOpTest() 455 case INSTR_MUL: a64asm->MUL(test.cond, test.setFlags, Rd,Rm,Rs); break; in dataOpTest() 456 case INSTR_MLA: a64asm->MLA(test.cond, test.setFlags, Rd,Rm,Rs,Rn); break; in dataOpTest() 460 case INSTR_SMULBB:a64asm->SMULBB(test.cond, Rd,Rm,Rs); break; in dataOpTest() 461 case INSTR_SMULBT:a64asm->SMULBT(test.cond, Rd,Rm,Rs); break; in dataOpTest() 462 case INSTR_SMULTB:a64asm->SMULTB(test.cond, Rd,Rm,Rs); break; in dataOpTest() 463 case INSTR_SMULTT:a64asm->SMULTT(test.cond, Rd,Rm,Rs); break; in dataOpTest() 464 case INSTR_SMULWB:a64asm->SMULWB(test.cond, Rd,Rm,Rs); break; in dataOpTest() 465 case INSTR_SMULWT:a64asm->SMULWT(test.cond, Rd,Rm,Rs); break; in dataOpTest() [all …]
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