/system/core/libpixelflinger/codeflinger/ |
D | load_store.cpp | 37 if (inc) STR(AL, s.reg, addr.reg, immed12_post(4)); in store() 38 else STR(AL, s.reg, addr.reg); in store() 43 STRB(AL, s.reg, addr.reg, immed12_pre(0)); in store() 44 MOV(AL, 0, s.reg, reg_imm(s.reg, ROR, 8)); in store() 45 STRB(AL, s.reg, addr.reg, immed12_pre(1)); in store() 46 MOV(AL, 0, s.reg, reg_imm(s.reg, ROR, 8)); in store() 47 STRB(AL, s.reg, addr.reg, immed12_pre(2)); in store() 49 MOV(AL, 0, s.reg, reg_imm(s.reg, ROR, 16)); in store() 52 ADD(AL, 0, addr.reg, addr.reg, imm(3)); in store() 55 if (inc) STRH(AL, s.reg, addr.reg, immed8_post(2)); in store() [all …]
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D | blending.cpp | 42 integer_t fragment(temp.reg, temp.h, temp.flags); in build_fog() 44 temp.reg = regs.obtain(); in build_fog() 49 LDRB(AL, fogColor.reg, mBuilderContext.Rctx, in build_fog() 53 CONTEXT_LOAD(factor.reg, generated_vars.f); in build_fog() 57 BIC(AL, 0, factor.reg, factor.reg, reg_imm(factor.reg, ASR, 31)); in build_fog() 58 CMP(AL, factor.reg, imm( 0x10000 )); in build_fog() 59 MOV(HS, 0, factor.reg, imm( 0x10000 )); in build_fog() 140 MOV(AL, 0, temp.reg, reg_imm(temp.reg, LSR, temp.l)); in build_blending() 144 integer_t fragment(temp.reg, temp.size(), temp.flags); in build_blending() 149 fragment.reg = scratches.obtain(); in build_blending() [all …]
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D | GGLAssembler.cpp | 207 MOV(AL, 0, parts.count.reg, in scanline_core() 208 reg_imm(parts.count.reg, ROR, GGL_DITHER_ORDER_SHIFT)); in scanline_core() 209 ADD(AL, 0, parts.count.reg, parts.count.reg, in scanline_core() 211 MOV(AL, 0, parts.count.reg, in scanline_core() 212 reg_imm(parts.count.reg, ROR, 32 - GGL_DITHER_ORDER_SHIFT)); in scanline_core() 264 AND(AL, 0, parts.dither.reg, parts.count.reg, imm(mask)); in scanline_core() 265 ADDR_ADD(AL, 0, parts.dither.reg, ctxtReg, parts.dither.reg); in scanline_core() 266 LDRB(AL, parts.dither.reg, parts.dither.reg, in scanline_core() 291 if (pixel.reg == -1) { in scanline_core() 323 SUB(AL, S, parts.count.reg, parts.count.reg, imm(1<<16)); in scanline_core() [all …]
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D | texturing.cpp | 85 parts.argb[i].reg = c; in init_iterated_color() 88 parts.argb_dx[i].reg = (parts.reload & 2) ? t1 : obtainReg(); in init_iterated_color() 89 const int dvdx = parts.argb_dx[i].reg; in init_iterated_color() 91 MLA(AL, 0, c, x.reg, dvdx, c); in init_iterated_color() 99 MOV(AL, 0, end, reg_imm(parts.count.reg, LSR, 16)); in init_iterated_color() 133 CONTEXT_LOAD(parts.iterated.reg, packed8888); in init_iterated_color() 157 CONTEXT_LOAD(parts.iterated.reg, packed); in init_iterated_color() 159 AND(AL, 0, parts.iterated.reg, in init_iterated_color() 160 parts.iterated.reg, imm(0xFF)); in init_iterated_color() 162 MOV(AL, 0, parts.iterated.reg, in init_iterated_color() [all …]
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D | GGLAssembler.h | 54 int reserveReg(int reg); 56 void recycleReg(int reg); 73 int reserve(int reg); 76 void recycle(int reg); 80 inline int isUsed(int reg) const; 111 int reg = mRegFile.obtain(); in obtain() local 112 mScratch |= 1<<reg; in obtain() 113 return reg; in obtain() 115 void recycle(int reg) { in recycle() argument 116 mRegFile.recycle(reg); in recycle() [all …]
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D | Arm64Disassembler.cpp | 126 static void decode_rx_zr_token(uint32_t reg, const char *prefix, char *instr_part) in decode_rx_zr_token() argument 128 if(reg == 31) in decode_rx_zr_token() 131 sprintf(instr_part, "%s%d", prefix, reg); in decode_rx_zr_token() 195 uint32_t reg = bits_unsigned(code, 20,16); in decode_token() local 196 if(reg == 31) in decode_token() 199 sprintf(instr_part, "%d", reg); in decode_token() 229 uint32_t reg = bits_unsigned(code, 9, 5); in decode_token() local 230 if(reg == 31) in decode_token() 233 sprintf(instr_part, "x%d", reg); in decode_token() 237 uint32_t reg = bits_unsigned(code, 4, 0); in decode_token() local [all …]
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D | MIPS64Assembler.cpp | 223 amode.reg = Rm; in reg_imm() 270 amode.reg = Rm; in reg_scale_pre() 307 amode.reg = Rm; in reg_pre() 376 case LSL: mMips->SLL(tmpReg, amode.reg, amode.value); break; in dataProcAdrModes() 377 case LSR: mMips->SRL(tmpReg, amode.reg, amode.value); break; in dataProcAdrModes() 378 case ASR: mMips->SRA(tmpReg, amode.reg, amode.value); break; in dataProcAdrModes() 379 case ROR: mMips->ROTR(tmpReg, amode.reg, amode.value); break; in dataProcAdrModes() 499 case LSL: mMips->SLL(Rd, amode.reg, amode.value); break; in dataProcessing() 500 case LSR: mMips->SRL(Rd, amode.reg, amode.value); break; in dataProcessing() 501 case ASR: mMips->SRA(Rd, amode.reg, amode.value); break; in dataProcessing() [all …]
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D | MIPSAssembler.cpp | 234 amode.reg = Rm; in reg_imm() 281 amode.reg = Rm; in reg_scale_pre() 322 amode.reg = Rm; in reg_pre() 391 case LSL: mMips->SLL(tmpReg, amode.reg, amode.value); break; in dataProcAdrModes() 392 case LSR: mMips->SRL(tmpReg, amode.reg, amode.value); break; in dataProcAdrModes() 393 case ASR: mMips->SRA(tmpReg, amode.reg, amode.value); break; in dataProcAdrModes() 395 mMips->ROTR(tmpReg, amode.reg, amode.value); in dataProcAdrModes() 397 mMips->RORIsyn(tmpReg, amode.reg, amode.value); in dataProcAdrModes() 502 case LSL: mMips->SLL(Rd, amode.reg, amode.value); break; in dataProcessing() 503 case LSR: mMips->SRL(Rd, amode.reg, amode.value); break; in dataProcessing() [all …]
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/system/core/libunwindstack/ |
D | RegsInfo.h | 36 inline AddressType Get(uint32_t reg) { in Get() 37 if (IsSaved(reg)) { in Get() 38 return saved_regs[reg]; in Get() 40 return (*regs)[reg]; in Get() 43 inline AddressType* Save(uint32_t reg) { in Save() 44 if (reg >= MAX_REGISTERS) { in Save() 49 saved_reg_map |= 1ULL << reg; in Save() 50 saved_regs[reg] = (*regs)[reg]; in Save() 51 return &(*regs)[reg]; in Save() 54 inline bool IsSaved(uint32_t reg) { in IsSaved() [all …]
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D | ArmExidx.cpp | 210 for (size_t reg = 4; reg < 16; reg++) { in DecodePrefix_10_00() local 211 if (registers & (1 << reg)) { in DecodePrefix_10_00() 215 msg += android::base::StringPrintf("r%zu", reg); in DecodePrefix_10_00() 223 for (size_t reg = 4; reg < 16; reg++) { in DecodePrefix_10_00() local 224 if (registers & (1 << reg)) { in DecodePrefix_10_00() 225 log_regs_[reg] = cfa_offset; in DecodePrefix_10_00() 236 for (size_t reg = 4; reg < 16; reg++) { in DecodePrefix_10_00() local 237 if (registers & (1 << reg)) { in DecodePrefix_10_00() 238 if (!process_memory_->Read32(cfa_, &(*regs_)[reg])) { in DecodePrefix_10_00() 315 for (uint8_t reg = 4; reg <= end_reg; reg++) { in DecodePrefix_10_10() local [all …]
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D | DwarfCfa.cpp | 184 uint8_t reg) { in LogOffsetRegisterString() argument 200 log(indent, "DW_CFA_offset register(%d) %" PRId64, reg, offset); in LogOffsetRegisterString() 350 AddressType reg = operands_[0]; in cfa_offset() local 351 (*loc_regs)[reg] = {.type = DWARF_LOCATION_OFFSET, .values = {operands_[1]}}; in cfa_offset() 357 AddressType reg = operands_[0]; in cfa_restore() local 363 auto reg_entry = cie_loc_regs_->find(reg); in cfa_restore() 365 loc_regs->erase(reg); in cfa_restore() 367 (*loc_regs)[reg] = reg_entry->second; in cfa_restore() 374 AddressType reg = operands_[0]; in cfa_undefined() local 375 (*loc_regs)[reg] = {.type = DWARF_LOCATION_UNDEFINED}; in cfa_undefined() [all …]
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D | DwarfSection.cpp | 418 bool DwarfSectionImpl<AddressType>::EvalRegister(const DwarfLocation* loc, uint32_t reg, in EvalRegister() argument 464 if (reg == eval_info->cie->return_address_register) { in EvalRegister() 469 if (!eval_info->regs_info.regs->SetPseudoRegister(reg, loc->values[0])) { in EvalRegister() 536 uint32_t reg = entry.first; in Eval() local 538 if (reg == CFA_REG) continue; in Eval() 541 if (reg >= cur_regs->total_regs()) { in Eval() 548 reg_ptr = eval_info.regs_info.Save(reg); in Eval() 549 if (!EvalRegister(&entry.second, reg, reg_ptr, &eval_info)) { in Eval()
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D | DwarfOp.cpp | 1906 uint16_t reg = cur_op() - 0x70; in op_breg() local 1907 if (reg >= regs_info_->Total()) { in op_breg() 1911 stack_.push_front(regs_info_->Get(reg) + OperandAt(0)); in op_breg() 1917 AddressType reg = OperandAt(0); in op_bregx() local 1918 if (reg >= regs_info_->Total()) { in op_bregx() 1922 stack_.push_front(regs_info_->Get(reg) + OperandAt(1)); in op_bregx()
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/system/extras/simpleperf/ |
D | perf_regs.cpp | 120 int reg = static_cast<int>(regno); in GetRegName() local 123 if (reg >= PERF_REG_X86_R8 && reg <= PERF_REG_X86_R15) { in GetRegName() 124 return android::base::StringPrintf("r%d", reg - PERF_REG_X86_R8 + 8); in GetRegName() 129 auto it = x86_reg_map.find(reg); in GetRegName() 130 CHECK(it != x86_reg_map.end()) << "unknown reg " << reg; in GetRegName() 134 if (reg >= PERF_REG_ARM_R0 && reg <= PERF_REG_ARM_R10) { in GetRegName() 135 return android::base::StringPrintf("r%d", reg - PERF_REG_ARM_R0); in GetRegName() 137 auto it = arm_reg_map.find(reg); in GetRegName() 138 CHECK(it != arm_reg_map.end()) << "unknown reg " << reg; in GetRegName() 142 if (reg >= PERF_REG_ARM64_X0 && reg <= PERF_REG_ARM64_X29) { in GetRegName() [all …]
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/system/nfc/src/nfa/sys/ |
D | nfa_sys_main.cc | 85 freebuf = (*nfa_sys_cb.reg[id]->evt_hdlr)(p_msg); in nfa_sys_event() 122 nfa_sys_cb.reg[id] = (tNFA_SYS_REG*)p_reg; in nfa_sys_register() 162 (*nfa_sys_cb.reg[NFA_ID_DM]->disable)(); in nfa_sys_check_disabled() 242 if (nfa_sys_cb.reg[id]->enable != nullptr) { in nfa_sys_enable_subsystems() 244 (*nfa_sys_cb.reg[id]->enable)(); in nfa_sys_enable_subsystems() 276 if (nfa_sys_cb.reg[id]->disable != nullptr) { in nfa_sys_disable_subsystems() 278 (*nfa_sys_cb.reg[id]->disable)(); in nfa_sys_disable_subsystems() 289 (*nfa_sys_cb.reg[NFA_ID_DM]->disable)(); in nfa_sys_disable_subsystems() 310 if ((nfa_sys_cb.is_reg[id]) && (nfa_sys_cb.reg[id]->proc_nfcc_pwr_mode)) { in nfa_sys_notify_nfcc_power_mode() 312 (*nfa_sys_cb.reg[id]->proc_nfcc_pwr_mode)(nfcc_power_mode); in nfa_sys_notify_nfcc_power_mode()
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/system/extras/tests/kernel.config/ |
D | scrape_mmap_addr.cpp | 13 …std::regex reg(std::string("^([a-f0-9]+)\\-[0-9a-f]+\\s+.+\\s+(\\d+)\\s+.+\\s+\\d+\\s+") + std::st… in main() local 24 if (std::regex_match (ln,sm, reg)) { in main()
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/system/core/libunwindstack/tests/ |
D | RegsInfoTest.cpp | 73 uint64_t* reg = info.Save(i); in TEST() local 74 ASSERT_EQ(reg, ®s[i]) << "Reg " + std::to_string(i) + " failed."; in TEST() 75 *reg = i * 0x1000 + 0x100; in TEST()
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D | RegsIterateTest.cpp | 245 for (const auto& reg : expected) { in TYPED_TEST() local 246 regs[reg.offset] = reg.offset; in TYPED_TEST()
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/system/bt/bta/sys/ |
D | bta_sys_main.cc | 459 if ((id < BTA_ID_MAX) && (bta_sys_cb.reg[id] != NULL)) { in bta_sys_event() 460 freebuf = (*bta_sys_cb.reg[id]->evt_hdlr)(p_msg); in bta_sys_event() 482 bta_sys_cb.reg[id] = (tBTA_SYS_REG*)p_reg; in bta_sys_register() 589 if (bta_sys_cb.reg[bta_id] != NULL) { in bta_sys_disable() 591 bta_sys_cb.reg[bta_id]->disable != NULL) { in bta_sys_disable() 592 (*bta_sys_cb.reg[bta_id]->disable)(); in bta_sys_disable()
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D | bta_sys_int.h | 54 tBTA_SYS_REG* reg[BTA_ID_MAX]; /* registration structures */ member
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/system/nfc/src/nfa/include/ |
D | nfa_sys_int.h | 43 tNFA_SYS_REG* reg[NFA_ID_MAX]; /* registration structures */ member
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D | nfa_snep_api.h | 157 tNFA_SNEP_REG reg; /* NFA_SNEP_REG_EVT */ member
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/system/core/libunwindstack/include/unwindstack/ |
D | Regs.h | 101 inline AddressType& operator[](size_t reg) { return regs_[reg]; }
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/system/bt/bta/ag/ |
D | bta_ag_act.cc | 116 tBTA_AG_REGISTER reg = {}; in bta_ag_register() local 117 reg.hdr.handle = bta_ag_scb_to_idx(p_scb); in bta_ag_register() 118 reg.hdr.app_id = p_scb->app_id; in bta_ag_register() 119 reg.status = BTA_AG_SUCCESS; in bta_ag_register() 120 (*bta_ag_cb.p_cback)(BTA_AG_REGISTER_EVT, (tBTA_AG*)®); in bta_ag_register()
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/system/core/fastboot/fuzzy_fastboot/ |
D | extensions.cpp | 200 const std::string reg = XMLAttribute(var, "assert"); in ExtractGetVars() local 205 Configuration::GetVar getvar{reg, MakeRegex(reg, var->GetLineNum()), var->GetLineNum()}; in ExtractGetVars()
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