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Searched refs:SCB (Results 1 – 14 of 14) sorted by relevance

/device/google/contexthub/firmware/os/cpu/cortexm4/
Dpendsv.c60 SCB->ICSR = 1UL << 28; in pendsvTrigger()
65 SCB->ICSR = 1UL << 27; in pendsvClear()
70 return !!(SCB->ICSR & (1UL << 28)); in pendsvIsPending()
DappSupport.c220 uint32_t hasSvcAct = SCB->SHCSR & SCB_SHCSR_SVCALLACT_Msk; in cpuAppInvoke()
222 SCB->SHCSR &= ~SCB_SHCSR_SVCALLACT_Msk; in cpuAppInvoke()
224 SCB->SHCSR |= hasSvcAct; in cpuAppInvoke()
Dcpu.c88 SCB->CPACR |= 0x00F00000; in cpuInit()
286 cpuPackSrBits(&dbx->sr_hfsr_cfsr_lo, &hi, excRegs[7], SCB->HFSR, SCB->CFSR); in logHardFault()
/device/google/contexthub/firmware/os/cpu/cortexm4/inc/cpu/cmsis/
Dcore_cm7.h1597 #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct… macro
1654 …reg_value = SCB->AIRCR; /* read old register c… in NVIC_SetPriorityGrouping()
1659 SCB->AIRCR = reg_value; in NVIC_SetPriorityGrouping()
1671 …return ((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos); /* read priority group… in NVIC_GetPriorityGrouping()
1767 …SCB->SHPR[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Pr… in NVIC_SetPriority()
1788 …return((uint32_t)(SCB->SHPR[((uint32_t)(IRQn) & 0xF)-4] >> (8 - __NVIC_PRIO_BITS))); } /* get pri… in NVIC_GetPriority()
1856 SCB->AIRCR = ((0x5FA << SCB_AIRCR_VECTKEY_Pos) | in NVIC_SystemReset()
1857 (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | in NVIC_SystemReset()
1888 SCB->ICIALLU = 0; // invalidate I-Cache in SCB_EnableICache()
1889 SCB->CCR |= SCB_CCR_IC_Msk; // enable I-Cache in SCB_EnableICache()
[all …]
Dcore_cm0.h503 #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct… macro
614 SCB->SHP[_SHP_IDX(IRQn)] = (SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFF << _BIT_SHIFT(IRQn))) | in NVIC_SetPriority()
637 …return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & 0xFF) >> (8 - __NVIC_PRIO_BIT… in NVIC_GetPriority()
651 SCB->AIRCR = ((0x5FA << SCB_AIRCR_VECTKEY_Pos) | in NVIC_SystemReset()
Dcore_cm0plus.h610 #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct… macro
725 SCB->SHP[_SHP_IDX(IRQn)] = (SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFF << _BIT_SHIFT(IRQn))) | in NVIC_SetPriority()
748 …return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & 0xFF) >> (8 - __NVIC_PRIO_BIT… in NVIC_GetPriority()
762 SCB->AIRCR = ((0x5FA << SCB_AIRCR_VECTKEY_Pos) | in NVIC_SystemReset()
Dcore_sc000.h630 #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct… macro
745 SCB->SHP[_SHP_IDX(IRQn)] = (SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFF << _BIT_SHIFT(IRQn))) | in NVIC_SetPriority()
768 …return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & 0xFF) >> (8 - __NVIC_PRIO_BIT… in NVIC_GetPriority()
782 SCB->AIRCR = ((0x5FA << SCB_AIRCR_VECTKEY_Pos) | in NVIC_SystemReset()
Dcore_cm3.h1264 #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct… macro
1316 …reg_value = SCB->AIRCR; /* read old register c… in NVIC_SetPriorityGrouping()
1321 SCB->AIRCR = reg_value; in NVIC_SetPriorityGrouping()
1333 …return ((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos); /* read priority group… in NVIC_GetPriorityGrouping()
1428 …SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Pri… in NVIC_SetPriority()
1449 …return((uint32_t)(SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] >> (8 - __NVIC_PRIO_BITS))); } /* get prio… in NVIC_GetPriority()
1517 SCB->AIRCR = ((0x5FA << SCB_AIRCR_VECTKEY_Pos) | in NVIC_SystemReset()
1518 (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | in NVIC_SystemReset()
Dcore_sc300.h1244 #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct… macro
1296 …reg_value = SCB->AIRCR; /* read old register c… in NVIC_SetPriorityGrouping()
1301 SCB->AIRCR = reg_value; in NVIC_SetPriorityGrouping()
1313 …return ((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos); /* read priority group… in NVIC_GetPriorityGrouping()
1408 …SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Pri… in NVIC_SetPriority()
1429 …return((uint32_t)(SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] >> (8 - __NVIC_PRIO_BITS))); } /* get prio… in NVIC_GetPriority()
1497 SCB->AIRCR = ((0x5FA << SCB_AIRCR_VECTKEY_Pos) | in NVIC_SystemReset()
1498 (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | in NVIC_SystemReset()
Dcore_cm4.h1410 #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct… macro
1467 …reg_value = SCB->AIRCR; /* read old register c… in NVIC_SetPriorityGrouping()
1472 SCB->AIRCR = reg_value; in NVIC_SetPriorityGrouping()
1484 …return ((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos); /* read priority group… in NVIC_GetPriorityGrouping()
1580 …SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Pri… in NVIC_SetPriority()
1601 …return((uint32_t)(SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] >> (8 - __NVIC_PRIO_BITS))); } /* get prio… in NVIC_GetPriority()
1669 SCB->AIRCR = ((0x5FA << SCB_AIRCR_VECTKEY_Pos) | in NVIC_SystemReset()
1670 (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | in NVIC_SystemReset()
/device/google/contexthub/firmware/os/platform/stm32/
Dpwr.c245 SCB->SCR &=~ SCB_SCR_SLEEPDEEP_Msk; in pwrSetSleepType()
248 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; in pwrSetSleepType()
251 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; in pwrSetSleepType()
255 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; in pwrSetSleepType()
259 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; in pwrSetSleepType()
Dbl.c377 SCB->AIRCR = 0x05FA0004; in blReboot()
487 SCB->VTOR = (uint32_t)&BL; in __blEntry()
497 SCB->VTOR = appBase; in __blEntry()
Dmpu.c138 SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; in mpuStart()
Dplatform.c240 SCB->SCR &=~ SCB_SCR_SLEEPONEXIT_Msk; in platInitialize()