1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef _UAPI_LINUX_ETHTOOL_H 20 #define _UAPI_LINUX_ETHTOOL_H 21 #include <linux/kernel.h> 22 #include <linux/types.h> 23 #include <linux/if_ether.h> 24 #include <limits.h> 25 struct ethtool_cmd { 26 __u32 cmd; 27 __u32 supported; 28 __u32 advertising; 29 __u16 speed; 30 __u8 duplex; 31 __u8 port; 32 __u8 phy_address; 33 __u8 transceiver; 34 __u8 autoneg; 35 __u8 mdio_support; 36 __u32 maxtxpkt; 37 __u32 maxrxpkt; 38 __u16 speed_hi; 39 __u8 eth_tp_mdix; 40 __u8 eth_tp_mdix_ctrl; 41 __u32 lp_advertising; 42 __u32 reserved[2]; 43 }; 44 #define ETH_MDIO_SUPPORTS_C22 1 45 #define ETH_MDIO_SUPPORTS_C45 2 46 #define ETHTOOL_FWVERS_LEN 32 47 #define ETHTOOL_BUSINFO_LEN 32 48 #define ETHTOOL_EROMVERS_LEN 32 49 struct ethtool_drvinfo { 50 __u32 cmd; 51 char driver[32]; 52 char version[32]; 53 char fw_version[ETHTOOL_FWVERS_LEN]; 54 char bus_info[ETHTOOL_BUSINFO_LEN]; 55 char erom_version[ETHTOOL_EROMVERS_LEN]; 56 char reserved2[12]; 57 __u32 n_priv_flags; 58 __u32 n_stats; 59 __u32 testinfo_len; 60 __u32 eedump_len; 61 __u32 regdump_len; 62 }; 63 #define SOPASS_MAX 6 64 struct ethtool_wolinfo { 65 __u32 cmd; 66 __u32 supported; 67 __u32 wolopts; 68 __u8 sopass[SOPASS_MAX]; 69 }; 70 struct ethtool_value { 71 __u32 cmd; 72 __u32 data; 73 }; 74 #define PFC_STORM_PREVENTION_AUTO 0xffff 75 #define PFC_STORM_PREVENTION_DISABLE 0 76 enum tunable_id { 77 ETHTOOL_ID_UNSPEC, 78 ETHTOOL_RX_COPYBREAK, 79 ETHTOOL_TX_COPYBREAK, 80 ETHTOOL_PFC_PREVENTION_TOUT, 81 __ETHTOOL_TUNABLE_COUNT, 82 }; 83 enum tunable_type_id { 84 ETHTOOL_TUNABLE_UNSPEC, 85 ETHTOOL_TUNABLE_U8, 86 ETHTOOL_TUNABLE_U16, 87 ETHTOOL_TUNABLE_U32, 88 ETHTOOL_TUNABLE_U64, 89 ETHTOOL_TUNABLE_STRING, 90 ETHTOOL_TUNABLE_S8, 91 ETHTOOL_TUNABLE_S16, 92 ETHTOOL_TUNABLE_S32, 93 ETHTOOL_TUNABLE_S64, 94 }; 95 struct ethtool_tunable { 96 __u32 cmd; 97 __u32 id; 98 __u32 type_id; 99 __u32 len; 100 void * data[0]; 101 }; 102 #define DOWNSHIFT_DEV_DEFAULT_COUNT 0xff 103 #define DOWNSHIFT_DEV_DISABLE 0 104 #define ETHTOOL_PHY_FAST_LINK_DOWN_ON 0 105 #define ETHTOOL_PHY_FAST_LINK_DOWN_OFF 0xff 106 #define ETHTOOL_PHY_EDPD_DFLT_TX_MSECS 0xffff 107 #define ETHTOOL_PHY_EDPD_NO_TX 0xfffe 108 #define ETHTOOL_PHY_EDPD_DISABLE 0 109 enum phy_tunable_id { 110 ETHTOOL_PHY_ID_UNSPEC, 111 ETHTOOL_PHY_DOWNSHIFT, 112 ETHTOOL_PHY_FAST_LINK_DOWN, 113 ETHTOOL_PHY_EDPD, 114 __ETHTOOL_PHY_TUNABLE_COUNT, 115 }; 116 struct ethtool_regs { 117 __u32 cmd; 118 __u32 version; 119 __u32 len; 120 __u8 data[0]; 121 }; 122 struct ethtool_eeprom { 123 __u32 cmd; 124 __u32 magic; 125 __u32 offset; 126 __u32 len; 127 __u8 data[0]; 128 }; 129 struct ethtool_eee { 130 __u32 cmd; 131 __u32 supported; 132 __u32 advertised; 133 __u32 lp_advertised; 134 __u32 eee_active; 135 __u32 eee_enabled; 136 __u32 tx_lpi_enabled; 137 __u32 tx_lpi_timer; 138 __u32 reserved[2]; 139 }; 140 struct ethtool_modinfo { 141 __u32 cmd; 142 __u32 type; 143 __u32 eeprom_len; 144 __u32 reserved[8]; 145 }; 146 struct ethtool_coalesce { 147 __u32 cmd; 148 __u32 rx_coalesce_usecs; 149 __u32 rx_max_coalesced_frames; 150 __u32 rx_coalesce_usecs_irq; 151 __u32 rx_max_coalesced_frames_irq; 152 __u32 tx_coalesce_usecs; 153 __u32 tx_max_coalesced_frames; 154 __u32 tx_coalesce_usecs_irq; 155 __u32 tx_max_coalesced_frames_irq; 156 __u32 stats_block_coalesce_usecs; 157 __u32 use_adaptive_rx_coalesce; 158 __u32 use_adaptive_tx_coalesce; 159 __u32 pkt_rate_low; 160 __u32 rx_coalesce_usecs_low; 161 __u32 rx_max_coalesced_frames_low; 162 __u32 tx_coalesce_usecs_low; 163 __u32 tx_max_coalesced_frames_low; 164 __u32 pkt_rate_high; 165 __u32 rx_coalesce_usecs_high; 166 __u32 rx_max_coalesced_frames_high; 167 __u32 tx_coalesce_usecs_high; 168 __u32 tx_max_coalesced_frames_high; 169 __u32 rate_sample_interval; 170 }; 171 struct ethtool_ringparam { 172 __u32 cmd; 173 __u32 rx_max_pending; 174 __u32 rx_mini_max_pending; 175 __u32 rx_jumbo_max_pending; 176 __u32 tx_max_pending; 177 __u32 rx_pending; 178 __u32 rx_mini_pending; 179 __u32 rx_jumbo_pending; 180 __u32 tx_pending; 181 }; 182 struct ethtool_channels { 183 __u32 cmd; 184 __u32 max_rx; 185 __u32 max_tx; 186 __u32 max_other; 187 __u32 max_combined; 188 __u32 rx_count; 189 __u32 tx_count; 190 __u32 other_count; 191 __u32 combined_count; 192 }; 193 struct ethtool_pauseparam { 194 __u32 cmd; 195 __u32 autoneg; 196 __u32 rx_pause; 197 __u32 tx_pause; 198 }; 199 #define ETH_GSTRING_LEN 32 200 enum ethtool_stringset { 201 ETH_SS_TEST = 0, 202 ETH_SS_STATS, 203 ETH_SS_PRIV_FLAGS, 204 ETH_SS_NTUPLE_FILTERS, 205 ETH_SS_FEATURES, 206 ETH_SS_RSS_HASH_FUNCS, 207 ETH_SS_TUNABLES, 208 ETH_SS_PHY_STATS, 209 ETH_SS_PHY_TUNABLES, 210 ETH_SS_LINK_MODES, 211 ETH_SS_MSG_CLASSES, 212 ETH_SS_WOL_MODES, 213 ETH_SS_SOF_TIMESTAMPING, 214 ETH_SS_TS_TX_TYPES, 215 ETH_SS_TS_RX_FILTERS, 216 ETH_SS_COUNT 217 }; 218 struct ethtool_gstrings { 219 __u32 cmd; 220 __u32 string_set; 221 __u32 len; 222 __u8 data[0]; 223 }; 224 struct ethtool_sset_info { 225 __u32 cmd; 226 __u32 reserved; 227 __u64 sset_mask; 228 __u32 data[0]; 229 }; 230 enum ethtool_test_flags { 231 ETH_TEST_FL_OFFLINE = (1 << 0), 232 ETH_TEST_FL_FAILED = (1 << 1), 233 ETH_TEST_FL_EXTERNAL_LB = (1 << 2), 234 ETH_TEST_FL_EXTERNAL_LB_DONE = (1 << 3), 235 }; 236 struct ethtool_test { 237 __u32 cmd; 238 __u32 flags; 239 __u32 reserved; 240 __u32 len; 241 __u64 data[0]; 242 }; 243 struct ethtool_stats { 244 __u32 cmd; 245 __u32 n_stats; 246 __u64 data[0]; 247 }; 248 struct ethtool_perm_addr { 249 __u32 cmd; 250 __u32 size; 251 __u8 data[0]; 252 }; 253 enum ethtool_flags { 254 ETH_FLAG_TXVLAN = (1 << 7), 255 ETH_FLAG_RXVLAN = (1 << 8), 256 ETH_FLAG_LRO = (1 << 15), 257 ETH_FLAG_NTUPLE = (1 << 27), 258 ETH_FLAG_RXHASH = (1 << 28), 259 }; 260 struct ethtool_tcpip4_spec { 261 __be32 ip4src; 262 __be32 ip4dst; 263 __be16 psrc; 264 __be16 pdst; 265 __u8 tos; 266 }; 267 struct ethtool_ah_espip4_spec { 268 __be32 ip4src; 269 __be32 ip4dst; 270 __be32 spi; 271 __u8 tos; 272 }; 273 #define ETH_RX_NFC_IP4 1 274 struct ethtool_usrip4_spec { 275 __be32 ip4src; 276 __be32 ip4dst; 277 __be32 l4_4_bytes; 278 __u8 tos; 279 __u8 ip_ver; 280 __u8 proto; 281 }; 282 struct ethtool_tcpip6_spec { 283 __be32 ip6src[4]; 284 __be32 ip6dst[4]; 285 __be16 psrc; 286 __be16 pdst; 287 __u8 tclass; 288 }; 289 struct ethtool_ah_espip6_spec { 290 __be32 ip6src[4]; 291 __be32 ip6dst[4]; 292 __be32 spi; 293 __u8 tclass; 294 }; 295 struct ethtool_usrip6_spec { 296 __be32 ip6src[4]; 297 __be32 ip6dst[4]; 298 __be32 l4_4_bytes; 299 __u8 tclass; 300 __u8 l4_proto; 301 }; 302 union ethtool_flow_union { 303 struct ethtool_tcpip4_spec tcp_ip4_spec; 304 struct ethtool_tcpip4_spec udp_ip4_spec; 305 struct ethtool_tcpip4_spec sctp_ip4_spec; 306 struct ethtool_ah_espip4_spec ah_ip4_spec; 307 struct ethtool_ah_espip4_spec esp_ip4_spec; 308 struct ethtool_usrip4_spec usr_ip4_spec; 309 struct ethtool_tcpip6_spec tcp_ip6_spec; 310 struct ethtool_tcpip6_spec udp_ip6_spec; 311 struct ethtool_tcpip6_spec sctp_ip6_spec; 312 struct ethtool_ah_espip6_spec ah_ip6_spec; 313 struct ethtool_ah_espip6_spec esp_ip6_spec; 314 struct ethtool_usrip6_spec usr_ip6_spec; 315 struct ethhdr ether_spec; 316 __u8 hdata[52]; 317 }; 318 struct ethtool_flow_ext { 319 __u8 padding[2]; 320 unsigned char h_dest[ETH_ALEN]; 321 __be16 vlan_etype; 322 __be16 vlan_tci; 323 __be32 data[2]; 324 }; 325 struct ethtool_rx_flow_spec { 326 __u32 flow_type; 327 union ethtool_flow_union h_u; 328 struct ethtool_flow_ext h_ext; 329 union ethtool_flow_union m_u; 330 struct ethtool_flow_ext m_ext; 331 __u64 ring_cookie; 332 __u32 location; 333 }; 334 #define ETHTOOL_RX_FLOW_SPEC_RING 0x00000000FFFFFFFFLL 335 #define ETHTOOL_RX_FLOW_SPEC_RING_VF 0x000000FF00000000LL 336 #define ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF 32 337 struct ethtool_rxnfc { 338 __u32 cmd; 339 __u32 flow_type; 340 __u64 data; 341 struct ethtool_rx_flow_spec fs; 342 union { 343 __u32 rule_cnt; 344 __u32 rss_context; 345 }; 346 __u32 rule_locs[0]; 347 }; 348 struct ethtool_rxfh_indir { 349 __u32 cmd; 350 __u32 size; 351 __u32 ring_index[0]; 352 }; 353 struct ethtool_rxfh { 354 __u32 cmd; 355 __u32 rss_context; 356 __u32 indir_size; 357 __u32 key_size; 358 __u8 hfunc; 359 __u8 rsvd8[3]; 360 __u32 rsvd32; 361 __u32 rss_config[0]; 362 }; 363 #define ETH_RXFH_CONTEXT_ALLOC 0xffffffff 364 #define ETH_RXFH_INDIR_NO_CHANGE 0xffffffff 365 struct ethtool_rx_ntuple_flow_spec { 366 __u32 flow_type; 367 union { 368 struct ethtool_tcpip4_spec tcp_ip4_spec; 369 struct ethtool_tcpip4_spec udp_ip4_spec; 370 struct ethtool_tcpip4_spec sctp_ip4_spec; 371 struct ethtool_ah_espip4_spec ah_ip4_spec; 372 struct ethtool_ah_espip4_spec esp_ip4_spec; 373 struct ethtool_usrip4_spec usr_ip4_spec; 374 struct ethhdr ether_spec; 375 __u8 hdata[72]; 376 } h_u, m_u; 377 __u16 vlan_tag; 378 __u16 vlan_tag_mask; 379 __u64 data; 380 __u64 data_mask; 381 __s32 action; 382 #define ETHTOOL_RXNTUPLE_ACTION_DROP (- 1) 383 #define ETHTOOL_RXNTUPLE_ACTION_CLEAR (- 2) 384 }; 385 struct ethtool_rx_ntuple { 386 __u32 cmd; 387 struct ethtool_rx_ntuple_flow_spec fs; 388 }; 389 #define ETHTOOL_FLASH_MAX_FILENAME 128 390 enum ethtool_flash_op_type { 391 ETHTOOL_FLASH_ALL_REGIONS = 0, 392 }; 393 struct ethtool_flash { 394 __u32 cmd; 395 __u32 region; 396 char data[ETHTOOL_FLASH_MAX_FILENAME]; 397 }; 398 struct ethtool_dump { 399 __u32 cmd; 400 __u32 version; 401 __u32 flag; 402 __u32 len; 403 __u8 data[0]; 404 }; 405 #define ETH_FW_DUMP_DISABLE 0 406 struct ethtool_get_features_block { 407 __u32 available; 408 __u32 requested; 409 __u32 active; 410 __u32 never_changed; 411 }; 412 struct ethtool_gfeatures { 413 __u32 cmd; 414 __u32 size; 415 struct ethtool_get_features_block features[0]; 416 }; 417 struct ethtool_set_features_block { 418 __u32 valid; 419 __u32 requested; 420 }; 421 struct ethtool_sfeatures { 422 __u32 cmd; 423 __u32 size; 424 struct ethtool_set_features_block features[0]; 425 }; 426 struct ethtool_ts_info { 427 __u32 cmd; 428 __u32 so_timestamping; 429 __s32 phc_index; 430 __u32 tx_types; 431 __u32 tx_reserved[3]; 432 __u32 rx_filters; 433 __u32 rx_reserved[3]; 434 }; 435 enum ethtool_sfeatures_retval_bits { 436 ETHTOOL_F_UNSUPPORTED__BIT, 437 ETHTOOL_F_WISH__BIT, 438 ETHTOOL_F_COMPAT__BIT, 439 }; 440 #define ETHTOOL_F_UNSUPPORTED (1 << ETHTOOL_F_UNSUPPORTED__BIT) 441 #define ETHTOOL_F_WISH (1 << ETHTOOL_F_WISH__BIT) 442 #define ETHTOOL_F_COMPAT (1 << ETHTOOL_F_COMPAT__BIT) 443 #define MAX_NUM_QUEUE 4096 444 struct ethtool_per_queue_op { 445 __u32 cmd; 446 __u32 sub_command; 447 __u32 queue_mask[__KERNEL_DIV_ROUND_UP(MAX_NUM_QUEUE, 32)]; 448 char data[]; 449 }; 450 struct ethtool_fecparam { 451 __u32 cmd; 452 __u32 active_fec; 453 __u32 fec; 454 __u32 reserved; 455 }; 456 enum ethtool_fec_config_bits { 457 ETHTOOL_FEC_NONE_BIT, 458 ETHTOOL_FEC_AUTO_BIT, 459 ETHTOOL_FEC_OFF_BIT, 460 ETHTOOL_FEC_RS_BIT, 461 ETHTOOL_FEC_BASER_BIT, 462 ETHTOOL_FEC_LLRS_BIT, 463 }; 464 #define ETHTOOL_FEC_NONE (1 << ETHTOOL_FEC_NONE_BIT) 465 #define ETHTOOL_FEC_AUTO (1 << ETHTOOL_FEC_AUTO_BIT) 466 #define ETHTOOL_FEC_OFF (1 << ETHTOOL_FEC_OFF_BIT) 467 #define ETHTOOL_FEC_RS (1 << ETHTOOL_FEC_RS_BIT) 468 #define ETHTOOL_FEC_BASER (1 << ETHTOOL_FEC_BASER_BIT) 469 #define ETHTOOL_FEC_LLRS (1 << ETHTOOL_FEC_LLRS_BIT) 470 #define ETHTOOL_GSET 0x00000001 471 #define ETHTOOL_SSET 0x00000002 472 #define ETHTOOL_GDRVINFO 0x00000003 473 #define ETHTOOL_GREGS 0x00000004 474 #define ETHTOOL_GWOL 0x00000005 475 #define ETHTOOL_SWOL 0x00000006 476 #define ETHTOOL_GMSGLVL 0x00000007 477 #define ETHTOOL_SMSGLVL 0x00000008 478 #define ETHTOOL_NWAY_RST 0x00000009 479 #define ETHTOOL_GLINK 0x0000000a 480 #define ETHTOOL_GEEPROM 0x0000000b 481 #define ETHTOOL_SEEPROM 0x0000000c 482 #define ETHTOOL_GCOALESCE 0x0000000e 483 #define ETHTOOL_SCOALESCE 0x0000000f 484 #define ETHTOOL_GRINGPARAM 0x00000010 485 #define ETHTOOL_SRINGPARAM 0x00000011 486 #define ETHTOOL_GPAUSEPARAM 0x00000012 487 #define ETHTOOL_SPAUSEPARAM 0x00000013 488 #define ETHTOOL_GRXCSUM 0x00000014 489 #define ETHTOOL_SRXCSUM 0x00000015 490 #define ETHTOOL_GTXCSUM 0x00000016 491 #define ETHTOOL_STXCSUM 0x00000017 492 #define ETHTOOL_GSG 0x00000018 493 #define ETHTOOL_SSG 0x00000019 494 #define ETHTOOL_TEST 0x0000001a 495 #define ETHTOOL_GSTRINGS 0x0000001b 496 #define ETHTOOL_PHYS_ID 0x0000001c 497 #define ETHTOOL_GSTATS 0x0000001d 498 #define ETHTOOL_GTSO 0x0000001e 499 #define ETHTOOL_STSO 0x0000001f 500 #define ETHTOOL_GPERMADDR 0x00000020 501 #define ETHTOOL_GUFO 0x00000021 502 #define ETHTOOL_SUFO 0x00000022 503 #define ETHTOOL_GGSO 0x00000023 504 #define ETHTOOL_SGSO 0x00000024 505 #define ETHTOOL_GFLAGS 0x00000025 506 #define ETHTOOL_SFLAGS 0x00000026 507 #define ETHTOOL_GPFLAGS 0x00000027 508 #define ETHTOOL_SPFLAGS 0x00000028 509 #define ETHTOOL_GRXFH 0x00000029 510 #define ETHTOOL_SRXFH 0x0000002a 511 #define ETHTOOL_GGRO 0x0000002b 512 #define ETHTOOL_SGRO 0x0000002c 513 #define ETHTOOL_GRXRINGS 0x0000002d 514 #define ETHTOOL_GRXCLSRLCNT 0x0000002e 515 #define ETHTOOL_GRXCLSRULE 0x0000002f 516 #define ETHTOOL_GRXCLSRLALL 0x00000030 517 #define ETHTOOL_SRXCLSRLDEL 0x00000031 518 #define ETHTOOL_SRXCLSRLINS 0x00000032 519 #define ETHTOOL_FLASHDEV 0x00000033 520 #define ETHTOOL_RESET 0x00000034 521 #define ETHTOOL_SRXNTUPLE 0x00000035 522 #define ETHTOOL_GRXNTUPLE 0x00000036 523 #define ETHTOOL_GSSET_INFO 0x00000037 524 #define ETHTOOL_GRXFHINDIR 0x00000038 525 #define ETHTOOL_SRXFHINDIR 0x00000039 526 #define ETHTOOL_GFEATURES 0x0000003a 527 #define ETHTOOL_SFEATURES 0x0000003b 528 #define ETHTOOL_GCHANNELS 0x0000003c 529 #define ETHTOOL_SCHANNELS 0x0000003d 530 #define ETHTOOL_SET_DUMP 0x0000003e 531 #define ETHTOOL_GET_DUMP_FLAG 0x0000003f 532 #define ETHTOOL_GET_DUMP_DATA 0x00000040 533 #define ETHTOOL_GET_TS_INFO 0x00000041 534 #define ETHTOOL_GMODULEINFO 0x00000042 535 #define ETHTOOL_GMODULEEEPROM 0x00000043 536 #define ETHTOOL_GEEE 0x00000044 537 #define ETHTOOL_SEEE 0x00000045 538 #define ETHTOOL_GRSSH 0x00000046 539 #define ETHTOOL_SRSSH 0x00000047 540 #define ETHTOOL_GTUNABLE 0x00000048 541 #define ETHTOOL_STUNABLE 0x00000049 542 #define ETHTOOL_GPHYSTATS 0x0000004a 543 #define ETHTOOL_PERQUEUE 0x0000004b 544 #define ETHTOOL_GLINKSETTINGS 0x0000004c 545 #define ETHTOOL_SLINKSETTINGS 0x0000004d 546 #define ETHTOOL_PHY_GTUNABLE 0x0000004e 547 #define ETHTOOL_PHY_STUNABLE 0x0000004f 548 #define ETHTOOL_GFECPARAM 0x00000050 549 #define ETHTOOL_SFECPARAM 0x00000051 550 #define SPARC_ETH_GSET ETHTOOL_GSET 551 #define SPARC_ETH_SSET ETHTOOL_SSET 552 enum ethtool_link_mode_bit_indices { 553 ETHTOOL_LINK_MODE_10baseT_Half_BIT = 0, 554 ETHTOOL_LINK_MODE_10baseT_Full_BIT = 1, 555 ETHTOOL_LINK_MODE_100baseT_Half_BIT = 2, 556 ETHTOOL_LINK_MODE_100baseT_Full_BIT = 3, 557 ETHTOOL_LINK_MODE_1000baseT_Half_BIT = 4, 558 ETHTOOL_LINK_MODE_1000baseT_Full_BIT = 5, 559 ETHTOOL_LINK_MODE_Autoneg_BIT = 6, 560 ETHTOOL_LINK_MODE_TP_BIT = 7, 561 ETHTOOL_LINK_MODE_AUI_BIT = 8, 562 ETHTOOL_LINK_MODE_MII_BIT = 9, 563 ETHTOOL_LINK_MODE_FIBRE_BIT = 10, 564 ETHTOOL_LINK_MODE_BNC_BIT = 11, 565 ETHTOOL_LINK_MODE_10000baseT_Full_BIT = 12, 566 ETHTOOL_LINK_MODE_Pause_BIT = 13, 567 ETHTOOL_LINK_MODE_Asym_Pause_BIT = 14, 568 ETHTOOL_LINK_MODE_2500baseX_Full_BIT = 15, 569 ETHTOOL_LINK_MODE_Backplane_BIT = 16, 570 ETHTOOL_LINK_MODE_1000baseKX_Full_BIT = 17, 571 ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT = 18, 572 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT = 19, 573 ETHTOOL_LINK_MODE_10000baseR_FEC_BIT = 20, 574 ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT = 21, 575 ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT = 22, 576 ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT = 23, 577 ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT = 24, 578 ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT = 25, 579 ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT = 26, 580 ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT = 27, 581 ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT = 28, 582 ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT = 29, 583 ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT = 30, 584 ETHTOOL_LINK_MODE_25000baseCR_Full_BIT = 31, 585 ETHTOOL_LINK_MODE_25000baseKR_Full_BIT = 32, 586 ETHTOOL_LINK_MODE_25000baseSR_Full_BIT = 33, 587 ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT = 34, 588 ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT = 35, 589 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT = 36, 590 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT = 37, 591 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT = 38, 592 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT = 39, 593 ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT = 40, 594 ETHTOOL_LINK_MODE_1000baseX_Full_BIT = 41, 595 ETHTOOL_LINK_MODE_10000baseCR_Full_BIT = 42, 596 ETHTOOL_LINK_MODE_10000baseSR_Full_BIT = 43, 597 ETHTOOL_LINK_MODE_10000baseLR_Full_BIT = 44, 598 ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT = 45, 599 ETHTOOL_LINK_MODE_10000baseER_Full_BIT = 46, 600 ETHTOOL_LINK_MODE_2500baseT_Full_BIT = 47, 601 ETHTOOL_LINK_MODE_5000baseT_Full_BIT = 48, 602 ETHTOOL_LINK_MODE_FEC_NONE_BIT = 49, 603 ETHTOOL_LINK_MODE_FEC_RS_BIT = 50, 604 ETHTOOL_LINK_MODE_FEC_BASER_BIT = 51, 605 ETHTOOL_LINK_MODE_50000baseKR_Full_BIT = 52, 606 ETHTOOL_LINK_MODE_50000baseSR_Full_BIT = 53, 607 ETHTOOL_LINK_MODE_50000baseCR_Full_BIT = 54, 608 ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT = 55, 609 ETHTOOL_LINK_MODE_50000baseDR_Full_BIT = 56, 610 ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT = 57, 611 ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT = 58, 612 ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT = 59, 613 ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT = 60, 614 ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT = 61, 615 ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT = 62, 616 ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT = 63, 617 ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT = 64, 618 ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT = 65, 619 ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT = 66, 620 ETHTOOL_LINK_MODE_100baseT1_Full_BIT = 67, 621 ETHTOOL_LINK_MODE_1000baseT1_Full_BIT = 68, 622 ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT = 69, 623 ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT = 70, 624 ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT = 71, 625 ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT = 72, 626 ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT = 73, 627 ETHTOOL_LINK_MODE_FEC_LLRS_BIT = 74, 628 __ETHTOOL_LINK_MODE_MASK_NBITS 629 }; 630 #define __ETHTOOL_LINK_MODE_LEGACY_MASK(base_name) (1UL << (ETHTOOL_LINK_MODE_ ##base_name ##_BIT)) 631 #define SUPPORTED_10baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(10baseT_Half) 632 #define SUPPORTED_10baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10baseT_Full) 633 #define SUPPORTED_100baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(100baseT_Half) 634 #define SUPPORTED_100baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(100baseT_Full) 635 #define SUPPORTED_1000baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseT_Half) 636 #define SUPPORTED_1000baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseT_Full) 637 #define SUPPORTED_Autoneg __ETHTOOL_LINK_MODE_LEGACY_MASK(Autoneg) 638 #define SUPPORTED_TP __ETHTOOL_LINK_MODE_LEGACY_MASK(TP) 639 #define SUPPORTED_AUI __ETHTOOL_LINK_MODE_LEGACY_MASK(AUI) 640 #define SUPPORTED_MII __ETHTOOL_LINK_MODE_LEGACY_MASK(MII) 641 #define SUPPORTED_FIBRE __ETHTOOL_LINK_MODE_LEGACY_MASK(FIBRE) 642 #define SUPPORTED_BNC __ETHTOOL_LINK_MODE_LEGACY_MASK(BNC) 643 #define SUPPORTED_10000baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseT_Full) 644 #define SUPPORTED_Pause __ETHTOOL_LINK_MODE_LEGACY_MASK(Pause) 645 #define SUPPORTED_Asym_Pause __ETHTOOL_LINK_MODE_LEGACY_MASK(Asym_Pause) 646 #define SUPPORTED_2500baseX_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(2500baseX_Full) 647 #define SUPPORTED_Backplane __ETHTOOL_LINK_MODE_LEGACY_MASK(Backplane) 648 #define SUPPORTED_1000baseKX_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseKX_Full) 649 #define SUPPORTED_10000baseKX4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseKX4_Full) 650 #define SUPPORTED_10000baseKR_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseKR_Full) 651 #define SUPPORTED_10000baseR_FEC __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseR_FEC) 652 #define SUPPORTED_20000baseMLD2_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(20000baseMLD2_Full) 653 #define SUPPORTED_20000baseKR2_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(20000baseKR2_Full) 654 #define SUPPORTED_40000baseKR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseKR4_Full) 655 #define SUPPORTED_40000baseCR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseCR4_Full) 656 #define SUPPORTED_40000baseSR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseSR4_Full) 657 #define SUPPORTED_40000baseLR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseLR4_Full) 658 #define SUPPORTED_56000baseKR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseKR4_Full) 659 #define SUPPORTED_56000baseCR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseCR4_Full) 660 #define SUPPORTED_56000baseSR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseSR4_Full) 661 #define SUPPORTED_56000baseLR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseLR4_Full) 662 #define ADVERTISED_10baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(10baseT_Half) 663 #define ADVERTISED_10baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10baseT_Full) 664 #define ADVERTISED_100baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(100baseT_Half) 665 #define ADVERTISED_100baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(100baseT_Full) 666 #define ADVERTISED_1000baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseT_Half) 667 #define ADVERTISED_1000baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseT_Full) 668 #define ADVERTISED_Autoneg __ETHTOOL_LINK_MODE_LEGACY_MASK(Autoneg) 669 #define ADVERTISED_TP __ETHTOOL_LINK_MODE_LEGACY_MASK(TP) 670 #define ADVERTISED_AUI __ETHTOOL_LINK_MODE_LEGACY_MASK(AUI) 671 #define ADVERTISED_MII __ETHTOOL_LINK_MODE_LEGACY_MASK(MII) 672 #define ADVERTISED_FIBRE __ETHTOOL_LINK_MODE_LEGACY_MASK(FIBRE) 673 #define ADVERTISED_BNC __ETHTOOL_LINK_MODE_LEGACY_MASK(BNC) 674 #define ADVERTISED_10000baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseT_Full) 675 #define ADVERTISED_Pause __ETHTOOL_LINK_MODE_LEGACY_MASK(Pause) 676 #define ADVERTISED_Asym_Pause __ETHTOOL_LINK_MODE_LEGACY_MASK(Asym_Pause) 677 #define ADVERTISED_2500baseX_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(2500baseX_Full) 678 #define ADVERTISED_Backplane __ETHTOOL_LINK_MODE_LEGACY_MASK(Backplane) 679 #define ADVERTISED_1000baseKX_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseKX_Full) 680 #define ADVERTISED_10000baseKX4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseKX4_Full) 681 #define ADVERTISED_10000baseKR_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseKR_Full) 682 #define ADVERTISED_10000baseR_FEC __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseR_FEC) 683 #define ADVERTISED_20000baseMLD2_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(20000baseMLD2_Full) 684 #define ADVERTISED_20000baseKR2_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(20000baseKR2_Full) 685 #define ADVERTISED_40000baseKR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseKR4_Full) 686 #define ADVERTISED_40000baseCR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseCR4_Full) 687 #define ADVERTISED_40000baseSR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseSR4_Full) 688 #define ADVERTISED_40000baseLR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseLR4_Full) 689 #define ADVERTISED_56000baseKR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseKR4_Full) 690 #define ADVERTISED_56000baseCR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseCR4_Full) 691 #define ADVERTISED_56000baseSR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseSR4_Full) 692 #define ADVERTISED_56000baseLR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseLR4_Full) 693 #define SPEED_10 10 694 #define SPEED_100 100 695 #define SPEED_1000 1000 696 #define SPEED_2500 2500 697 #define SPEED_5000 5000 698 #define SPEED_10000 10000 699 #define SPEED_14000 14000 700 #define SPEED_20000 20000 701 #define SPEED_25000 25000 702 #define SPEED_40000 40000 703 #define SPEED_50000 50000 704 #define SPEED_56000 56000 705 #define SPEED_100000 100000 706 #define SPEED_200000 200000 707 #define SPEED_400000 400000 708 #define SPEED_UNKNOWN - 1 709 #define DUPLEX_HALF 0x00 710 #define DUPLEX_FULL 0x01 711 #define DUPLEX_UNKNOWN 0xff 712 #define PORT_TP 0x00 713 #define PORT_AUI 0x01 714 #define PORT_MII 0x02 715 #define PORT_FIBRE 0x03 716 #define PORT_BNC 0x04 717 #define PORT_DA 0x05 718 #define PORT_NONE 0xef 719 #define PORT_OTHER 0xff 720 #define XCVR_INTERNAL 0x00 721 #define XCVR_EXTERNAL 0x01 722 #define XCVR_DUMMY1 0x02 723 #define XCVR_DUMMY2 0x03 724 #define XCVR_DUMMY3 0x04 725 #define AUTONEG_DISABLE 0x00 726 #define AUTONEG_ENABLE 0x01 727 #define ETH_TP_MDI_INVALID 0x00 728 #define ETH_TP_MDI 0x01 729 #define ETH_TP_MDI_X 0x02 730 #define ETH_TP_MDI_AUTO 0x03 731 #define WAKE_PHY (1 << 0) 732 #define WAKE_UCAST (1 << 1) 733 #define WAKE_MCAST (1 << 2) 734 #define WAKE_BCAST (1 << 3) 735 #define WAKE_ARP (1 << 4) 736 #define WAKE_MAGIC (1 << 5) 737 #define WAKE_MAGICSECURE (1 << 6) 738 #define WAKE_FILTER (1 << 7) 739 #define WOL_MODE_COUNT 8 740 #define TCP_V4_FLOW 0x01 741 #define UDP_V4_FLOW 0x02 742 #define SCTP_V4_FLOW 0x03 743 #define AH_ESP_V4_FLOW 0x04 744 #define TCP_V6_FLOW 0x05 745 #define UDP_V6_FLOW 0x06 746 #define SCTP_V6_FLOW 0x07 747 #define AH_ESP_V6_FLOW 0x08 748 #define AH_V4_FLOW 0x09 749 #define ESP_V4_FLOW 0x0a 750 #define AH_V6_FLOW 0x0b 751 #define ESP_V6_FLOW 0x0c 752 #define IPV4_USER_FLOW 0x0d 753 #define IP_USER_FLOW IPV4_USER_FLOW 754 #define IPV6_USER_FLOW 0x0e 755 #define IPV4_FLOW 0x10 756 #define IPV6_FLOW 0x11 757 #define ETHER_FLOW 0x12 758 #define FLOW_EXT 0x80000000 759 #define FLOW_MAC_EXT 0x40000000 760 #define FLOW_RSS 0x20000000 761 #define RXH_L2DA (1 << 1) 762 #define RXH_VLAN (1 << 2) 763 #define RXH_L3_PROTO (1 << 3) 764 #define RXH_IP_SRC (1 << 4) 765 #define RXH_IP_DST (1 << 5) 766 #define RXH_L4_B_0_1 (1 << 6) 767 #define RXH_L4_B_2_3 (1 << 7) 768 #define RXH_DISCARD (1 << 31) 769 #define RX_CLS_FLOW_DISC 0xffffffffffffffffULL 770 #define RX_CLS_FLOW_WAKE 0xfffffffffffffffeULL 771 #define RX_CLS_LOC_SPECIAL 0x80000000 772 #define RX_CLS_LOC_ANY 0xffffffff 773 #define RX_CLS_LOC_FIRST 0xfffffffe 774 #define RX_CLS_LOC_LAST 0xfffffffd 775 #define ETH_MODULE_SFF_8079 0x1 776 #define ETH_MODULE_SFF_8079_LEN 256 777 #define ETH_MODULE_SFF_8472 0x2 778 #define ETH_MODULE_SFF_8472_LEN 512 779 #define ETH_MODULE_SFF_8636 0x3 780 #define ETH_MODULE_SFF_8636_LEN 256 781 #define ETH_MODULE_SFF_8436 0x4 782 #define ETH_MODULE_SFF_8436_LEN 256 783 #define ETH_MODULE_SFF_8636_MAX_LEN 640 784 #define ETH_MODULE_SFF_8436_MAX_LEN 640 785 enum ethtool_reset_flags { 786 ETH_RESET_MGMT = 1 << 0, 787 ETH_RESET_IRQ = 1 << 1, 788 ETH_RESET_DMA = 1 << 2, 789 ETH_RESET_FILTER = 1 << 3, 790 ETH_RESET_OFFLOAD = 1 << 4, 791 ETH_RESET_MAC = 1 << 5, 792 ETH_RESET_PHY = 1 << 6, 793 ETH_RESET_RAM = 1 << 7, 794 ETH_RESET_AP = 1 << 8, 795 ETH_RESET_DEDICATED = 0x0000ffff, 796 ETH_RESET_ALL = 0xffffffff, 797 }; 798 #define ETH_RESET_SHARED_SHIFT 16 799 struct ethtool_link_settings { 800 __u32 cmd; 801 __u32 speed; 802 __u8 duplex; 803 __u8 port; 804 __u8 phy_address; 805 __u8 autoneg; 806 __u8 mdio_support; 807 __u8 eth_tp_mdix; 808 __u8 eth_tp_mdix_ctrl; 809 __s8 link_mode_masks_nwords; 810 __u8 transceiver; 811 __u8 reserved1[3]; 812 __u32 reserved[7]; 813 __u32 link_mode_masks[0]; 814 }; 815 #endif 816