Lines Matching refs:base_reg

1024           const uint32_t base_reg = BakerReadBarrierFirstRegField::Decode(encoded_data);  in Finalize()  local
1027 CHECK_EQ(next_insn & 0xffc003e0u, 0xb9400000u | (base_reg << 5)); in Finalize()
1031 CHECK_EQ(next_insn & 0xffffffe0u, 0x88dffc00u | (base_reg << 5)); in Finalize()
1041 const uint32_t base_reg = BakerReadBarrierFirstRegField::Decode(encoded_data); in Finalize() local
1042 CHECK_EQ(next_insn & 0xffe0ffe0u, 0xb8607800u | (base_reg << 5)); in Finalize()
6684 vixl::aarch64::Register base_reg, in EmitGrayCheckAndFastPath() argument
6709 __ Add(base_reg, base_reg, Operand(ip0, LSR, 32)); in EmitGrayCheckAndFastPath()
6731 auto base_reg = in CompileBakerReadBarrierThunk() local
6733 CheckValidReg(base_reg.GetCode()); in CompileBakerReadBarrierThunk()
6752 (holder_reg.Is(base_reg) || (kind == BakerReadBarrierKind::kAcquire))) { in CompileBakerReadBarrierThunk()
6762 EmitGrayCheckAndFastPath(assembler, base_reg, lock_word, &slow_path, throw_npe); in CompileBakerReadBarrierThunk()
6769 __ Ldr(ip0.W(), MemOperand(base_reg, ip0, LSL, 2)); // Load the reference. in CompileBakerReadBarrierThunk()
6772 DCHECK(!base_reg.Is(holder_reg)); in CompileBakerReadBarrierThunk()
6774 __ Ldar(ip0.W(), MemOperand(base_reg)); in CompileBakerReadBarrierThunk()
6781 auto base_reg = in CompileBakerReadBarrierThunk() local
6783 CheckValidReg(base_reg.GetCode()); in CompileBakerReadBarrierThunk()
6791 MemOperand lock_word(base_reg, mirror::Object::MonitorOffset().Int32Value() - data_offset); in CompileBakerReadBarrierThunk()
6793 EmitGrayCheckAndFastPath(assembler, base_reg, lock_word, &slow_path); in CompileBakerReadBarrierThunk()
6801 __ Mov(ip0, base_reg); // Move the base register to ip0. in CompileBakerReadBarrierThunk()