Lines Matching refs:source

334       Location source = instruction_->IsLoadClass() ? out : locations->InAt(0);  in EmitNativeCode()  local
336 source, in EmitNativeCode()
1464 Location source, in MoveLocation() argument
1466 if (source.Equals(destination)) { in MoveLocation()
1478 HConstant* src_cst = source.IsConstant() ? source.GetConstant() : nullptr; in MoveLocation()
1479 if (source.IsStackSlot() || in MoveLocation()
1496 if (source.IsStackSlot() || source.IsDoubleStackSlot()) { in MoveLocation()
1497 DCHECK(dst.Is64Bits() == source.IsDoubleStackSlot()); in MoveLocation()
1498 __ Ldr(dst, StackOperandFrom(source)); in MoveLocation()
1499 } else if (source.IsSIMDStackSlot()) { in MoveLocation()
1500 GetInstructionCodeGeneratorArm64()->LoadSIMDRegFromStack(destination, source); in MoveLocation()
1501 } else if (source.IsConstant()) { in MoveLocation()
1502 DCHECK(CoherentConstantAndType(source, dst_type)); in MoveLocation()
1503 MoveConstant(dst, source.GetConstant()); in MoveLocation()
1504 } else if (source.IsRegister()) { in MoveLocation()
1506 __ Mov(Register(dst), RegisterFrom(source, dst_type)); in MoveLocation()
1512 __ Fmov(FPRegisterFrom(destination, dst_type), RegisterFrom(source, source_type)); in MoveLocation()
1515 DCHECK(source.IsFpuRegister()); in MoveLocation()
1520 __ Fmov(RegisterFrom(destination, dst_type), FPRegisterFrom(source, source_type)); in MoveLocation()
1524 GetInstructionCodeGeneratorArm64()->MoveSIMDRegToSIMDReg(destination, source); in MoveLocation()
1526 __ Fmov(VRegister(dst), FPRegisterFrom(source, dst_type)); in MoveLocation()
1531 GetInstructionCodeGeneratorArm64()->MoveToSIMDStackSlot(destination, source); in MoveLocation()
1534 if (source.IsRegister() || source.IsFpuRegister()) { in MoveLocation()
1536 if (source.IsRegister()) { in MoveLocation()
1544 (source.IsFpuRegister() == DataType::IsFloatingPointType(dst_type))); in MoveLocation()
1545 __ Str(CPURegisterFrom(source, dst_type), StackOperandFrom(destination)); in MoveLocation()
1546 } else if (source.IsConstant()) { in MoveLocation()
1547 DCHECK(unspecified_type || CoherentConstantAndType(source, dst_type)) in MoveLocation()
1548 << source << " " << dst_type; in MoveLocation()
1550 HConstant* src_cst = source.GetConstant(); in MoveLocation()
1571 DCHECK(source.IsStackSlot() || source.IsDoubleStackSlot()); in MoveLocation()
1572 DCHECK(source.IsDoubleStackSlot() == destination.IsDoubleStackSlot()); in MoveLocation()
1593 __ Ldr(temp, StackOperandFrom(source)); in MoveLocation()
2084 CPURegister source = value; in HandleFieldSet() local
2098 source = temp; in HandleFieldSet()
2103 instruction, field_type, source, HeapOperand(obj, offset), /* needs_null_check= */ true); in HandleFieldSet()
2107 codegen_->Store(field_type, source, HeapOperand(obj, offset)); in HandleFieldSet()
2535 MemOperand source = HeapOperand(obj); in VisitArrayGet() local
2571 source = HeapOperand(obj, offset); in VisitArrayGet()
2600 source = HeapOperand(temp, XRegisterFrom(index), LSL, DataType::SizeShift(type)); in VisitArrayGet()
2606 codegen_->Load(type, OutputCPURegister(instruction), source); in VisitArrayGet()
2672 CPURegister source = value; in VisitArraySet() local
2787 source = temp_source; in VisitArraySet()
2805 __ Str(source, destination); in VisitArraySet()
6032 Register source = InputRegisterAt(conversion, 0); in VisitTypeConversion() local
6041 __ Mov(output.W(), source.W()); in VisitTypeConversion()
6044 __ Ubfx(output, output.IsX() ? source.X() : source.W(), 0, result_size * kBitsPerByte); in VisitTypeConversion()
6046 __ Sbfx(output, output.IsX() ? source.X() : source.W(), 0, min_size * kBitsPerByte); in VisitTypeConversion()