Lines Matching refs:destination
1540 void CodeGeneratorX86_64::Move(Location destination, Location source) { in Move() argument
1541 if (source.Equals(destination)) { in Move()
1544 if (destination.IsRegister()) { in Move()
1545 CpuRegister dest = destination.AsRegister<CpuRegister>(); in Move()
1563 } else if (destination.IsFpuRegister()) { in Move()
1564 XmmRegister dest = destination.AsFpuRegister<XmmRegister>(); in Move()
1583 } else if (destination.IsStackSlot()) { in Move()
1585 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()), in Move()
1588 __ movss(Address(CpuRegister(RSP), destination.GetStackIndex()), in Move()
1593 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()), Immediate(value)); in Move()
1597 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()), CpuRegister(TMP)); in Move()
1600 DCHECK(destination.IsDoubleStackSlot()); in Move()
1602 __ movq(Address(CpuRegister(RSP), destination.GetStackIndex()), in Move()
1605 __ movsd(Address(CpuRegister(RSP), destination.GetStackIndex()), in Move()
1611 Store64BitValueToStack(destination, value); in Move()
1615 __ movq(Address(CpuRegister(RSP), destination.GetStackIndex()), CpuRegister(TMP)); in Move()
5810 Location destination = move->GetDestination(); in EmitMove() local
5813 if (destination.IsRegister()) { in EmitMove()
5814 __ movq(destination.AsRegister<CpuRegister>(), source.AsRegister<CpuRegister>()); in EmitMove()
5815 } else if (destination.IsStackSlot()) { in EmitMove()
5816 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()), in EmitMove()
5819 DCHECK(destination.IsDoubleStackSlot()); in EmitMove()
5820 __ movq(Address(CpuRegister(RSP), destination.GetStackIndex()), in EmitMove()
5824 if (destination.IsRegister()) { in EmitMove()
5825 __ movl(destination.AsRegister<CpuRegister>(), in EmitMove()
5827 } else if (destination.IsFpuRegister()) { in EmitMove()
5828 __ movss(destination.AsFpuRegister<XmmRegister>(), in EmitMove()
5831 DCHECK(destination.IsStackSlot()); in EmitMove()
5833 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()), CpuRegister(TMP)); in EmitMove()
5836 if (destination.IsRegister()) { in EmitMove()
5837 __ movq(destination.AsRegister<CpuRegister>(), in EmitMove()
5839 } else if (destination.IsFpuRegister()) { in EmitMove()
5840 __ movsd(destination.AsFpuRegister<XmmRegister>(), in EmitMove()
5843 DCHECK(destination.IsDoubleStackSlot()) << destination; in EmitMove()
5845 __ movq(Address(CpuRegister(RSP), destination.GetStackIndex()), CpuRegister(TMP)); in EmitMove()
5848 if (destination.IsFpuRegister()) { in EmitMove()
5849 __ movups(destination.AsFpuRegister<XmmRegister>(), in EmitMove()
5852 DCHECK(destination.IsSIMDStackSlot()); in EmitMove()
5855 __ movq(Address(CpuRegister(RSP), destination.GetStackIndex()), CpuRegister(TMP)); in EmitMove()
5857 __ movq(Address(CpuRegister(RSP), destination.GetStackIndex() + high), CpuRegister(TMP)); in EmitMove()
5863 if (destination.IsRegister()) { in EmitMove()
5865 __ xorl(destination.AsRegister<CpuRegister>(), destination.AsRegister<CpuRegister>()); in EmitMove()
5867 __ movl(destination.AsRegister<CpuRegister>(), Immediate(value)); in EmitMove()
5870 DCHECK(destination.IsStackSlot()) << destination; in EmitMove()
5871 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()), Immediate(value)); in EmitMove()
5875 if (destination.IsRegister()) { in EmitMove()
5876 codegen_->Load64BitValue(destination.AsRegister<CpuRegister>(), value); in EmitMove()
5878 DCHECK(destination.IsDoubleStackSlot()) << destination; in EmitMove()
5879 codegen_->Store64BitValueToStack(destination, value); in EmitMove()
5883 if (destination.IsFpuRegister()) { in EmitMove()
5884 XmmRegister dest = destination.AsFpuRegister<XmmRegister>(); in EmitMove()
5887 DCHECK(destination.IsStackSlot()) << destination; in EmitMove()
5889 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()), imm); in EmitMove()
5895 if (destination.IsFpuRegister()) { in EmitMove()
5896 XmmRegister dest = destination.AsFpuRegister<XmmRegister>(); in EmitMove()
5899 DCHECK(destination.IsDoubleStackSlot()) << destination; in EmitMove()
5900 codegen_->Store64BitValueToStack(destination, value); in EmitMove()
5904 if (destination.IsFpuRegister()) { in EmitMove()
5905 __ movaps(destination.AsFpuRegister<XmmRegister>(), source.AsFpuRegister<XmmRegister>()); in EmitMove()
5906 } else if (destination.IsStackSlot()) { in EmitMove()
5907 __ movss(Address(CpuRegister(RSP), destination.GetStackIndex()), in EmitMove()
5909 } else if (destination.IsDoubleStackSlot()) { in EmitMove()
5910 __ movsd(Address(CpuRegister(RSP), destination.GetStackIndex()), in EmitMove()
5913 DCHECK(destination.IsSIMDStackSlot()); in EmitMove()
5914 __ movups(Address(CpuRegister(RSP), destination.GetStackIndex()), in EmitMove()
5995 Location destination = move->GetDestination(); in EmitSwap() local
5997 if (source.IsRegister() && destination.IsRegister()) { in EmitSwap()
5998 Exchange64(source.AsRegister<CpuRegister>(), destination.AsRegister<CpuRegister>()); in EmitSwap()
5999 } else if (source.IsRegister() && destination.IsStackSlot()) { in EmitSwap()
6000 Exchange32(source.AsRegister<CpuRegister>(), destination.GetStackIndex()); in EmitSwap()
6001 } else if (source.IsStackSlot() && destination.IsRegister()) { in EmitSwap()
6002 Exchange32(destination.AsRegister<CpuRegister>(), source.GetStackIndex()); in EmitSwap()
6003 } else if (source.IsStackSlot() && destination.IsStackSlot()) { in EmitSwap()
6004 ExchangeMemory32(destination.GetStackIndex(), source.GetStackIndex()); in EmitSwap()
6005 } else if (source.IsRegister() && destination.IsDoubleStackSlot()) { in EmitSwap()
6006 Exchange64(source.AsRegister<CpuRegister>(), destination.GetStackIndex()); in EmitSwap()
6007 } else if (source.IsDoubleStackSlot() && destination.IsRegister()) { in EmitSwap()
6008 Exchange64(destination.AsRegister<CpuRegister>(), source.GetStackIndex()); in EmitSwap()
6009 } else if (source.IsDoubleStackSlot() && destination.IsDoubleStackSlot()) { in EmitSwap()
6010 ExchangeMemory64(destination.GetStackIndex(), source.GetStackIndex(), 1); in EmitSwap()
6011 } else if (source.IsFpuRegister() && destination.IsFpuRegister()) { in EmitSwap()
6013 __ movaps(source.AsFpuRegister<XmmRegister>(), destination.AsFpuRegister<XmmRegister>()); in EmitSwap()
6014 __ movd(destination.AsFpuRegister<XmmRegister>(), CpuRegister(TMP)); in EmitSwap()
6015 } else if (source.IsFpuRegister() && destination.IsStackSlot()) { in EmitSwap()
6016 Exchange32(source.AsFpuRegister<XmmRegister>(), destination.GetStackIndex()); in EmitSwap()
6017 } else if (source.IsStackSlot() && destination.IsFpuRegister()) { in EmitSwap()
6018 Exchange32(destination.AsFpuRegister<XmmRegister>(), source.GetStackIndex()); in EmitSwap()
6019 } else if (source.IsFpuRegister() && destination.IsDoubleStackSlot()) { in EmitSwap()
6020 Exchange64(source.AsFpuRegister<XmmRegister>(), destination.GetStackIndex()); in EmitSwap()
6021 } else if (source.IsDoubleStackSlot() && destination.IsFpuRegister()) { in EmitSwap()
6022 Exchange64(destination.AsFpuRegister<XmmRegister>(), source.GetStackIndex()); in EmitSwap()
6023 } else if (source.IsSIMDStackSlot() && destination.IsSIMDStackSlot()) { in EmitSwap()
6024 ExchangeMemory64(destination.GetStackIndex(), source.GetStackIndex(), 2); in EmitSwap()
6025 } else if (source.IsFpuRegister() && destination.IsSIMDStackSlot()) { in EmitSwap()
6026 Exchange128(source.AsFpuRegister<XmmRegister>(), destination.GetStackIndex()); in EmitSwap()
6027 } else if (destination.IsFpuRegister() && source.IsSIMDStackSlot()) { in EmitSwap()
6028 Exchange128(destination.AsFpuRegister<XmmRegister>(), source.GetStackIndex()); in EmitSwap()
6030 LOG(FATAL) << "Unimplemented swap between " << source << " and " << destination; in EmitSwap()