Lines Matching refs:second

3354   Location second = locations->InAt(1);  in VisitAdd()  local
3359 if (second.IsRegister()) { in VisitAdd()
3361 __ addl(out.AsRegister<CpuRegister>(), second.AsRegister<CpuRegister>()); in VisitAdd()
3362 } else if (out.AsRegister<Register>() == second.AsRegister<Register>()) { in VisitAdd()
3366 first.AsRegister<CpuRegister>(), second.AsRegister<CpuRegister>(), TIMES_1, 0)); in VisitAdd()
3368 } else if (second.IsConstant()) { in VisitAdd()
3371 Immediate(second.GetConstant()->AsIntConstant()->GetValue())); in VisitAdd()
3374 first.AsRegister<CpuRegister>(), second.GetConstant()->AsIntConstant()->GetValue())); in VisitAdd()
3378 __ addl(first.AsRegister<CpuRegister>(), Address(CpuRegister(RSP), second.GetStackIndex())); in VisitAdd()
3384 if (second.IsRegister()) { in VisitAdd()
3386 __ addq(out.AsRegister<CpuRegister>(), second.AsRegister<CpuRegister>()); in VisitAdd()
3387 } else if (out.AsRegister<Register>() == second.AsRegister<Register>()) { in VisitAdd()
3391 first.AsRegister<CpuRegister>(), second.AsRegister<CpuRegister>(), TIMES_1, 0)); in VisitAdd()
3394 DCHECK(second.IsConstant()); in VisitAdd()
3395 int64_t value = second.GetConstant()->AsLongConstant()->GetValue(); in VisitAdd()
3409 if (second.IsFpuRegister()) { in VisitAdd()
3410 __ addss(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>()); in VisitAdd()
3411 } else if (second.IsConstant()) { in VisitAdd()
3414 second.GetConstant()->AsFloatConstant()->GetValue())); in VisitAdd()
3416 DCHECK(second.IsStackSlot()); in VisitAdd()
3418 Address(CpuRegister(RSP), second.GetStackIndex())); in VisitAdd()
3424 if (second.IsFpuRegister()) { in VisitAdd()
3425 __ addsd(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>()); in VisitAdd()
3426 } else if (second.IsConstant()) { in VisitAdd()
3429 second.GetConstant()->AsDoubleConstant()->GetValue())); in VisitAdd()
3431 DCHECK(second.IsDoubleStackSlot()); in VisitAdd()
3433 Address(CpuRegister(RSP), second.GetStackIndex())); in VisitAdd()
3474 Location second = locations->InAt(1); in VisitSub() local
3478 if (second.IsRegister()) { in VisitSub()
3479 __ subl(first.AsRegister<CpuRegister>(), second.AsRegister<CpuRegister>()); in VisitSub()
3480 } else if (second.IsConstant()) { in VisitSub()
3481 Immediate imm(second.GetConstant()->AsIntConstant()->GetValue()); in VisitSub()
3484 __ subl(first.AsRegister<CpuRegister>(), Address(CpuRegister(RSP), second.GetStackIndex())); in VisitSub()
3489 if (second.IsConstant()) { in VisitSub()
3490 int64_t value = second.GetConstant()->AsLongConstant()->GetValue(); in VisitSub()
3494 __ subq(first.AsRegister<CpuRegister>(), second.AsRegister<CpuRegister>()); in VisitSub()
3500 if (second.IsFpuRegister()) { in VisitSub()
3501 __ subss(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>()); in VisitSub()
3502 } else if (second.IsConstant()) { in VisitSub()
3505 second.GetConstant()->AsFloatConstant()->GetValue())); in VisitSub()
3507 DCHECK(second.IsStackSlot()); in VisitSub()
3509 Address(CpuRegister(RSP), second.GetStackIndex())); in VisitSub()
3515 if (second.IsFpuRegister()) { in VisitSub()
3516 __ subsd(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>()); in VisitSub()
3517 } else if (second.IsConstant()) { in VisitSub()
3520 second.GetConstant()->AsDoubleConstant()->GetValue())); in VisitSub()
3522 DCHECK(second.IsDoubleStackSlot()); in VisitSub()
3524 Address(CpuRegister(RSP), second.GetStackIndex())); in VisitSub()
3577 Location second = locations->InAt(1); in VisitMul() local
3586 } else if (second.IsRegister()) { in VisitMul()
3588 __ imull(first.AsRegister<CpuRegister>(), second.AsRegister<CpuRegister>()); in VisitMul()
3591 DCHECK(second.IsStackSlot()); in VisitMul()
3593 Address(CpuRegister(RSP), second.GetStackIndex())); in VisitMul()
3609 } else if (second.IsRegister()) { in VisitMul()
3611 __ imulq(first.AsRegister<CpuRegister>(), second.AsRegister<CpuRegister>()); in VisitMul()
3613 DCHECK(second.IsDoubleStackSlot()); in VisitMul()
3616 Address(CpuRegister(RSP), second.GetStackIndex())); in VisitMul()
3623 if (second.IsFpuRegister()) { in VisitMul()
3624 __ mulss(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>()); in VisitMul()
3625 } else if (second.IsConstant()) { in VisitMul()
3628 second.GetConstant()->AsFloatConstant()->GetValue())); in VisitMul()
3630 DCHECK(second.IsStackSlot()); in VisitMul()
3632 Address(CpuRegister(RSP), second.GetStackIndex())); in VisitMul()
3639 if (second.IsFpuRegister()) { in VisitMul()
3640 __ mulsd(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>()); in VisitMul()
3641 } else if (second.IsConstant()) { in VisitMul()
3644 second.GetConstant()->AsDoubleConstant()->GetValue())); in VisitMul()
3646 DCHECK(second.IsDoubleStackSlot()); in VisitMul()
3648 Address(CpuRegister(RSP), second.GetStackIndex())); in VisitMul()
3686 Location second = locations->InAt(1); in GenerateRemFP() local
3694 PushOntoFPStack(second, elem_size, 2 * elem_size, is_float); in GenerateRemFP()
3737 Location second = locations->InAt(1); in DivRemOneOrMinusOne() local
3738 DCHECK(second.IsConstant()); in DivRemOneOrMinusOne()
3742 int64_t imm = Int64FromConstant(second.GetConstant()); in DivRemOneOrMinusOne()
3777 Location second = locations->InAt(1); in RemByPowerOfTwo() local
3780 int64_t imm = Int64FromConstant(second.GetConstant()); in RemByPowerOfTwo()
3811 Location second = locations->InAt(1); in DivByPowerOfTwo() local
3816 int64_t imm = Int64FromConstant(second.GetConstant()); in DivByPowerOfTwo()
3870 Location second = locations->InAt(1); in GenerateDivRemWithAnyConstant() local
3892 int imm = second.GetConstant()->AsIntConstant()->GetValue(); in GenerateDivRemWithAnyConstant()
3924 int64_t imm = second.GetConstant()->AsLongConstant()->GetValue(); in GenerateDivRemWithAnyConstant()
3986 Location second = locations->InAt(1); in GenerateDivRemIntegral() local
3991 if (second.IsConstant()) { in GenerateDivRemIntegral()
3992 int64_t imm = Int64FromConstant(second.GetConstant()); in GenerateDivRemIntegral()
4014 CpuRegister second_reg = second.AsRegister<CpuRegister>(); in GenerateDivRemIntegral()
4073 Location second = locations->InAt(1); in VisitDiv() local
4085 if (second.IsFpuRegister()) { in VisitDiv()
4086 __ divss(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>()); in VisitDiv()
4087 } else if (second.IsConstant()) { in VisitDiv()
4090 second.GetConstant()->AsFloatConstant()->GetValue())); in VisitDiv()
4092 DCHECK(second.IsStackSlot()); in VisitDiv()
4094 Address(CpuRegister(RSP), second.GetStackIndex())); in VisitDiv()
4100 if (second.IsFpuRegister()) { in VisitDiv()
4101 __ divsd(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>()); in VisitDiv()
4102 } else if (second.IsConstant()) { in VisitDiv()
4105 second.GetConstant()->AsDoubleConstant()->GetValue())); in VisitDiv()
4107 DCHECK(second.IsDoubleStackSlot()); in VisitDiv()
4109 Address(CpuRegister(RSP), second.GetStackIndex())); in VisitDiv()
4486 Location second = locations->InAt(1); in HandleShift() local
4490 if (second.IsRegister()) { in HandleShift()
4491 CpuRegister second_reg = second.AsRegister<CpuRegister>(); in HandleShift()
4500 Immediate imm(second.GetConstant()->AsIntConstant()->GetValue() & kMaxIntShiftDistance); in HandleShift()
4512 if (second.IsRegister()) { in HandleShift()
4513 CpuRegister second_reg = second.AsRegister<CpuRegister>(); in HandleShift()
4522 Immediate imm(second.GetConstant()->AsIntConstant()->GetValue() & kMaxLongShiftDistance); in HandleShift()
4561 Location second = locations->InAt(1); in VisitRor() local
4565 if (second.IsRegister()) { in VisitRor()
4566 CpuRegister second_reg = second.AsRegister<CpuRegister>(); in VisitRor()
4569 Immediate imm(second.GetConstant()->AsIntConstant()->GetValue() & kMaxIntShiftDistance); in VisitRor()
4574 if (second.IsRegister()) { in VisitRor()
4575 CpuRegister second_reg = second.AsRegister<CpuRegister>(); in VisitRor()
4578 Immediate imm(second.GetConstant()->AsIntConstant()->GetValue() & kMaxLongShiftDistance); in VisitRor()
7038 Location second = locations->InAt(1); in VisitX86AndNot() local
7040 …__ andn(dest.AsRegister<CpuRegister>(), first.AsRegister<CpuRegister>(), second.AsRegister<CpuRegi… in VisitX86AndNot()
7088 Location second = locations->InAt(1); in HandleBitwiseOperation() local
7092 if (second.IsRegister()) { in HandleBitwiseOperation()
7094 __ andl(first.AsRegister<CpuRegister>(), second.AsRegister<CpuRegister>()); in HandleBitwiseOperation()
7096 __ orl(first.AsRegister<CpuRegister>(), second.AsRegister<CpuRegister>()); in HandleBitwiseOperation()
7099 __ xorl(first.AsRegister<CpuRegister>(), second.AsRegister<CpuRegister>()); in HandleBitwiseOperation()
7101 } else if (second.IsConstant()) { in HandleBitwiseOperation()
7102 Immediate imm(second.GetConstant()->AsIntConstant()->GetValue()); in HandleBitwiseOperation()
7112 Address address(CpuRegister(RSP), second.GetStackIndex()); in HandleBitwiseOperation()
7127 if (second.IsConstant()) { in HandleBitwiseOperation()
7129 value = second.GetConstant()->AsLongConstant()->GetValue(); in HandleBitwiseOperation()
7140 } else if (second.IsDoubleStackSlot()) { in HandleBitwiseOperation()
7141 __ andq(first_reg, Address(CpuRegister(RSP), second.GetStackIndex())); in HandleBitwiseOperation()
7143 __ andq(first_reg, second.AsRegister<CpuRegister>()); in HandleBitwiseOperation()
7152 } else if (second.IsDoubleStackSlot()) { in HandleBitwiseOperation()
7153 __ orq(first_reg, Address(CpuRegister(RSP), second.GetStackIndex())); in HandleBitwiseOperation()
7155 __ orq(first_reg, second.AsRegister<CpuRegister>()); in HandleBitwiseOperation()
7165 } else if (second.IsDoubleStackSlot()) { in HandleBitwiseOperation()
7166 __ xorq(first_reg, Address(CpuRegister(RSP), second.GetStackIndex())); in HandleBitwiseOperation()
7168 __ xorq(first_reg, second.AsRegister<CpuRegister>()); in HandleBitwiseOperation()