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Searched defs:reg (Results 51 – 75 of 98) sorted by relevance

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/art/compiler/optimizing/
Dlocations.h129 static Location RegisterLocation(int reg) { in RegisterLocation()
133 static Location FpuRegisterLocation(int reg) { in FpuRegisterLocation()
165 int reg() const { in reg() function
477 static bool Contains(uint32_t register_set, uint32_t reg) { in Contains()
Dregister_allocator_graph_color.cc1063 int reg = location.reg(); in BlockRegister() local
1774 bool RegisterAllocatorGraphColor::IsCallerSave(size_t reg, bool processing_core_regs) { in IsCallerSave()
1780 static bool RegisterIsAligned(size_t reg) { in RegisterIsAligned()
1800 size_t reg = 0; in ColorInterferenceGraph() local
Dcommon_arm64.h205 inline Location LocationFrom(const vixl::aarch64::Register& reg) { in LocationFrom()
Dparallel_move_resolver.cc265 for (int reg = 0; reg < register_count; ++reg) { in AllocateScratchRegister() local
Dcode_generator_x86.cc121 DivRemMinusOneSlowPathX86(HInstruction* instruction, Register reg, bool is_div) in DivRemMinusOneSlowPathX86()
1072 static dwarf::Reg DWARFReg(Register reg) { in DWARFReg()
1078 Register reg = EAX; in MaybeIncrementHotness() local
1161 Register reg = kCoreCalleeSaves[i]; in GenerateFrameEntry() local
1194 Register reg = kCoreCalleeSaves[i]; in GenerateFrameExit() local
2031 Register reg = locations->Out().AsRegister<Register>(); in HandleCondition() local
5224 void CodeGeneratorX86::LoadBootImageAddress(Register reg, in LoadBootImageAddress()
6615 void ParallelMoveResolverX86::Exchange(Register reg, int mem) { in Exchange()
6626 void ParallelMoveResolverX86::Exchange32(XmmRegister reg, int mem) { in Exchange32()
6637 void ParallelMoveResolverX86::Exchange128(XmmRegister reg, int mem) { in Exchange128()
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Dparallel_move_test.cc29 static void DumpRegisterForTest(std::ostream& os, int reg) { in DumpRegisterForTest()
/art/compiler/utils/arm64/
Dassembler_arm64.h46 static inline dwarf::Reg DWARFReg(vixl::aarch64::CPURegister reg) { in DWARFReg()
Djni_macro_assembler_arm64.cc332 auto get_mask = [](ManagedRegister reg) -> uint64_t { in MoveArguments()
597 Arm64ManagedRegister reg = mreg.AsArm64(); in SignExtend() local
608 Arm64ManagedRegister reg = mreg.AsArm64(); in ZeroExtend() local
788 Arm64ManagedRegister reg = r.AsArm64(); in BuildFrame() local
824 Arm64ManagedRegister reg = r.AsArm64(); in RemoveFrame() local
/art/compiler/utils/
Dassembler_test.h362 for (auto reg : registers) { in RepeatTemplatedRegisterImmBits() local
728 std::string GetRegisterName(const Reg& reg) { in GetRegisterName()
1162 for (auto reg : registers) { in RepeatTemplatedRegMem() local
1202 for (auto reg : registers) { in RepeatTemplatedMemReg() local
1241 for (auto reg : registers) { in RepeatTemplatedRegister() local
1452 std::string GetRegName(const Reg& reg) { in GetRegName()
1474 std::string GetFPRegName(const FPReg& reg) { in GetFPRegName()
1480 std::string GetVecRegName(const VecReg& reg) { in GetVecRegName()
1510 for (auto reg : registers) { in RepeatRegisterImm() local
Djni_macro_assembler.h48 ArgumentLocation(ManagedRegister reg, size_t size) in ArgumentLocation()
/art/runtime/gc/space/
Dregion_space.h320 Region* reg = RefToRegionUnlocked(ref); in AddLiveBytes() local
355 Region* reg = &regions_[reg_idx]; in RegionIdxForRefUnchecked() local
670 Region* reg = &regions_[reg_idx]; in RefToRegionLocked() local
Dregion_space-inl.h469 Region* reg = RefToRegionLocked(reinterpret_cast<mirror::Object*>(addr)); in FreeLarge() local
/art/runtime/arch/arm/
Dquick_entrypoints_arm.S233 .macro RETURN_OR_DELIVER_PENDING_EXCEPTION_REG reg argument
2130 .macro READ_BARRIER_MARK_REG name, reg
2255 .macro BRBMI_RETURN_SWITCH_CASE reg argument
2263 .macro BRBMI_RETURN_SWITCH_CASE_OFFSET reg argument
/art/runtime/
Dstack.cc182 uint16_t reg = accessor.RegistersSize() - accessor.InsSize(); in GetThisObject() local
308 uint32_t reg = dex_register_map[vreg].GetMachineRegister(); in GetVRegFromOptimizedCode() local
320 uint32_t reg = dex_register_map[vreg].GetMachineRegister(); in GetVRegFromOptimizedCode() local
365 bool StackVisitor::GetRegisterIfAccessible(uint32_t reg, VRegKind kind, uint32_t* val) const { in GetRegisterIfAccessible()
Dstack_map.cc199 for (uint32_t reg = 0; reg < end; reg += kNumBits) { in DecodeDexRegisterMap() local
252 DexRegisterLocation reg = (*this)[i]; in Dump() local
/art/compiler/debug/dwarf/
Ddwarf_test.cc39 const Reg reg(6); in TEST_F() local
/art/compiler/utils/x86_64/
Djni_macro_assembler_x86_64.cc27 static dwarf::Reg DWARFReg(Register reg) { in DWARFReg()
30 static dwarf::Reg DWARFReg(FloatRegister reg) { in DWARFReg()
320 X86_64ManagedRegister reg = mreg.AsX86_64(); in SignExtend() local
331 X86_64ManagedRegister reg = mreg.AsX86_64(); in ZeroExtend() local
344 auto get_mask = [](ManagedRegister reg) -> uint32_t { in MoveArguments()
Dassembler_x86_64_test.cc311 std::string GetSecondaryRegisterName(const x86_64::CpuRegister& reg) override { in GetSecondaryRegisterName()
316 std::string GetTertiaryRegisterName(const x86_64::CpuRegister& reg) override { in GetTertiaryRegisterName()
321 std::string GetQuaternaryRegisterName(const x86_64::CpuRegister& reg) override { in GetQuaternaryRegisterName()
645 for (auto reg : registers) { in shll_fn() local
666 for (auto reg : registers) { in shlq_fn() local
687 for (auto reg : registers) { in shrl_fn() local
707 for (auto reg : registers) { in shrq_fn() local
727 for (auto reg : registers) { in sarl_fn() local
747 for (auto reg : registers) { in sarq_fn() local
767 for (auto reg : registers) { in rorl_fn() local
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/art/compiler/jni/quick/x86/
Dcalling_convention_x86.cc143 XmmRegister reg = static_cast<XmmRegister>(XMM0 + itr_float_and_doubles_); in CurrentParamRegister() local
/art/disassembler/
Ddisassembler_arm.cc76 DisassemblerStream& operator<<(vixl::aarch32::Register reg) override { in operator <<()
/art/runtime/verifier/
Dregister_line-inl.h209 inline void RegisterLine::ClearRegToLockDepth(size_t reg, size_t depth) { in ClearRegToLockDepth()
/art/compiler/jni/quick/arm64/
Dcalling_convention_arm64.cc368 [](XRegister reg) { return reg == X15; })); in HiddenArgumentRegister()
/art/compiler/jni/quick/arm/
Dcalling_convention_arm.cc533 [](Register reg) { return reg == R4; })); in HiddenArgumentRegister()
/art/compiler/utils/x86/
Djni_macro_assembler_x86.cc42 static dwarf::Reg DWARFReg(Register reg) { in DWARFReg()
282 X86ManagedRegister reg = mreg.AsX86(); in SignExtend() local
293 X86ManagedRegister reg = mreg.AsX86(); in ZeroExtend() local
/art/runtime/arch/
Dstub_test.cc95 #define PUSH(reg) "push " # reg "\n\t .cfi_adjust_cfa_offset 4\n\t" in Invoke3WithReferrerAndHidden() argument
96 #define POP(reg) "pop " # reg "\n\t .cfi_adjust_cfa_offset -4\n\t" in Invoke3WithReferrerAndHidden() argument
326 #define PUSH(reg) "pushq " # reg "\n\t .cfi_adjust_cfa_offset 8\n\t" in Invoke3WithReferrerAndHidden() argument
327 #define POP(reg) "popq " # reg "\n\t .cfi_adjust_cfa_offset -8\n\t" in Invoke3WithReferrerAndHidden() argument

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